Energy-efficient wireless front-end concepts for ultra lower power radio. - John R. Long; Wanghua Wu; Yunzhi Dong; Yi Zhao 003; Mihai A. T. Sanduleanu; John F. M. Gerrits; Gerrit van Veenendaal (CICC, 2008)

A 9mW high band FM-UWB receiver front-end. - Yunzhi Dong; Yi Zhao 003; John F. M. Gerrits; Gerrit van Veenendaal; John R. Long (ESSCIRC, 2008)

A Short Range, Low Data Rate, 7.2 GHz-7.7 GHz FM-UWB Receiver Front-End. - Yi Zhao 003; Yunzhi Dong; John F. M. Gerrits; Gerrit van Veenendaal; John R. Long; John R. Farserotu (IEEE J. Solid State Circuits, 2009)

Analog front-end for a 3 Gb/s POF receiver. - Yunzhi Dong; Kenneth W. Martin (ISCAS, 2010)

System and circuit considerations for low-complexity constant-envelope FM-UWB. - John F. M. Gerrits; Mina Danesh; Yi Zhao 003; Yunzhi Dong; Gerrit van Veenendaal; John R. Long; John R. Farserotu (ISCAS, 2010)

A monolithic 3.125 Gbps fiber optic receiver front-end for POF applications in 65 nm CMOS. - Yunzhi Dong; Kenneth W. Martin (CICC, 2011)

A High-Speed Fully-Integrated POF Receiver With Large-Area Photo Detectors in 65 nm CMOS. - Yunzhi Dong; Kenneth W. Martin (IEEE J. Solid State Circuits, 2012)

A 4-Gbps POF Receiver Using Linear Equalizer With Multi-Shunt-Shunt Feedbacks in 65-nm CMOS. - Yunzhi Dong; Kenneth W. Martin (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Advances in high-speed continuous-time delta-sigma modulators. - Trevor C. Caldwell; David Alldred; Richard Schreier; Hajime Shibata; Yunzhi Dong (CICC, 2014)

29.2 A 235mW CT 0-3 MASH ADC achieving -167dBFS/Hz NSD with 53MHz BW. - Yunzhi Dong; Richard Schreier; Wenhua Yang 002; Sudhir Korrapati; Ali Sheikholeslami (ISSCC, 2014)

A Continuous-Time 0-3 MASH ADC Achieving 88 dB DR With 53 MHz BW in 28 nm CMOS. - Yunzhi Dong; William Yang; Richard Schreier; Ali Sheikholeslami; Sudhir Korrapati (IEEE J. Solid State Circuits, 2014)

15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS. - Yunzhi Dong; Jialin Zhao 001; Wenhua Yang 002; Trevor C. Caldwell; Hajime Shibata; Richard Schreier; Qingdong Meng; José B. Silva; Donald Paterson; Jeffrey C. Gealow (ISSCC, 2016)

A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS. - Yunzhi Dong; Jialin Zhao 001; Wenhua Yang 002; Trevor C. Caldwell; Hajime Shibata; Zhao Li; Richard Schreier; Qingdong Meng; José B. Silva; Donald Paterson; Jeffrey C. Gealow (IEEE J. Solid State Circuits, 2016)

Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS. - Yunzhi Dong; José B. Silva; Qingdong Meng; Jialin Zhao 001; Wenhua Yang 002; Trevor C. Caldwell; Hajime Shibata; Zhao Li; Donald Paterson; Jeffrey C. Gealow (CICC, 2017)

A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique. - Jialin Zhao 001; Yunzhi Dong; Wenhua Yang 002; Hajime Shibata; Prawal Shrestha; Zhao Li; Trevor C. Caldwell; José B. Silva; Jeffrey C. Gealow (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter. - Hajime Shibata; Gerry Taylor; Bob Schell; Victor Kozlov; Sharvil Patil; Donald Paterson; Asha Ganesan; Yunzhi Dong; Wenhua Yang 002; Yue Yin; Zhao Li; Prawal Shrestha; et al. (ISSCC, 2020)

Introduction to the Special Section on High-Speed Wireline and Optical Communication Circuits and Systems. - Ping-Hsuan Hsieh; Chun-Ming Hsu; Yunzhi Dong (IEEE Open J. Circuits Syst., 2021)

Towards Building Edge-side Common Data Processing Services on The Computing Continuum. - Yusuke Tanimura; Hidemoto Nakada; Yunzhi Dong (Middleware Demos/Posters/Doctoral Symposium, 2023)