An 8-Bit 600-MSps Flash ADC Using Interpolating and Background Self-Calibrating Techniques. - Daehwa Paik; Yusuke Asada; Masaya Miyahara; Akira Matsuzawa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation. - Hyunui Lee; Yusuke Asada; Masaya Miyahara; Akira Matsuzawa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

Innovative Test Practices in Japan. - Yusuke Asada; Takahiko Shimizu; Yuji Gendai; Keno Sato; Takashi Ishida 003; Toshiyuki Okamoto; Tamotsu Ichikawa; Jiang-Lin Wei; Nene Kushita; Hirotaka Arai; Anna Kuwana; Takayuki Nakatani; et al. (VTS, 2019)