High reliability electron-ejection method for high density flash memories. - Takayuki Kawahara; Naoki Miyamoto; Syun-ichi Saeki; Yusuke Jyouno; Masataka Kato; Katsutaka Kimura (IEEE J. Solid State Circuits, 1995)

Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories. - Takayuki Kawahara; Takashi Kobayashi 002; Yusuke Jyouno; Syun-ichi Saeki; Naoki Miyamoto; T. Adachi; Masataka Kato; Akihiko Sato; J. Yugami; Hitoshi Kume; Katsutaka Kimura (IEEE J. Solid State Circuits, 1996)

20-Mb/s erase/record flash memory by asymmetrical operation. - Takayuki Kawahara; Yusuke Jyouno; Syun-ichi Saeki; Naoki Miyamoto; Katsutaka Kimura (IEEE J. Solid State Circuits, 1998)

Internal voltage generator for low voltage, quarter-micrometer flash memories. - Takayuki Kawahara; Syun-ichi Saeki; Yusuke Jyouno; Naoki Miyamoto; Takashi Kobayashi 002; Katsutaka Kimura (IEEE J. Solid State Circuits, 1998)