Nonvolatile SRAM (NV-SRAM) using functional MOSFET merged with resistive switching devices. - Shuu'ichirou Yamamoto; Yusuke Shuto; Satoshi Sugahara (CICC, 2009)

Monolithic integration of pseudo-spin-MOSFETs using a custom CMOS chip fabricated through multi-project wafer service. - Ryosho Nakane; Yusuke Shuto; Hiroaki Sukegawa; Zhenchao Wen; Shuu'ichirou Yamamoto; Seiji Mitani; Masaaki Tanaka; Koichiro Inomata; Satoshi Sugahara (ESSDERC, 2013)

Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technology. - Yusuke Shuto; Shuu'ichirou Yamamoto; Satoshi Sugahara (APCCAS, 2014)

Comparative study of power-gating architectures for nonvolatile FinFET-SRAM using spintronics-based retention technology. - Yusuke Shuto; Shuu'ichirou Yamamoto; Satoshi Sugahara (DATE, 2015)

Energy performance of nonvolatile power-gating SRAM using SOTB technology. - Yusuke Shuto; Shuu'ichirou Yamamoto; Satoshi Sugahara (ESSCIRC, 2016)

Design and implementation of nonvolatile power-gating SRAM using SOTB technology. - Yusuke Shuto; Shuu'ichirou Yamamoto; Satoshi Sugahara (ISLPED, 2016)

Energy Efficient Write Verify and Retry Scheme for MTJ Based Flip-Flop and Application. - Kimiyoshi Usami; Junya Akaike; Sosuke Akiba; Masaru Kudo; Hideharu Amano; Takeharu Ikezoe; Keizo Hiraga; Yusuke Shuto; Kojiro Yagami (NVMSA, 2018)

A Coarse Grained-Reconfigurable Accelerator with energy efficient MTJ-based Non-volatile Flip-flops. - Takeharu Ikezoe; Hideharu Amano; Junya Akaike; Kimiyoshi Usami; Masaru Kudo; Keizo Hiraga; Yusuke Shuto; Kojiro Yagami (ReConFig, 2018)

High-Endurance and Low-Voltage operation of 1T1C FeRAM Arrays for Nonvolatile Memory Application. - Jun Okuno; Takafumi Kunihiro; Kenta Konishi; Hideki Maemura; Yusuke Shuto; Fumitaka Sugaya; Monica Materano; Tarek Ali; Maximilian Lederer; Kati Kühnel; Konrad Seidel; Uwe Schroeder; et al. (IMW, 2021)

Analog In-memory Computing in FeFET-based 1T1R Array for Edge AI Applications. - Daisuke Saito; Toshiyuki Kobayashi; Hiroki Koga; Nicolo Ronchi; Kaustuv Banerjee; Yusuke Shuto; Jun Okuno; Kenta Konishi; Luca Di Piazza; Arindam Mallik; Jan Van Houdt; Masanori Tsukamoto; et al. (VLSI Circuits, 2021)

HZO-based Nonvolatile SRAM Array with 100% Bit Recall Yield and Sufficient Retention Time at 85°C. - Yusuke Shuto; Jun Okuno; Tsubasa Yonai; Ryo Ono; Peter Reinig; Maximilian Lederer; Konrad Seidel; Ruben Alcala; Thomas Mikolajick; Uwe Schroeder; Taku Umebayashi; Kentaro Akiyama (VLSI Technology and Circuits, 2024)