Dynamically reconfigurable architecture for multi-rate compatible regular LDPC decoding. - Akiyuki Nagashima; Yuta Imai; Nozomu Togawa; Masao Yanagisawa; Tatsuo Ohtsuki (APCCAS, 2008)

A scalable massively parallel processor for real-time image processing. - Takashi Kurafuji; Masaru Haraguchi; Masami Nakajima; Takayuki Gyohten; Tetsu Nishijima; Hiroyuki Yamasaki; Yuta Imai; Masakatsu Ishizaki; Takeshi Kumaki; Yoshihiro Okuno; Tetsushi Koide; Hans Jürgen Mattausch; et al. (ISSCC, 2010)

A Scalable Massively Parallel Processor for Real-Time Image Processing. - Takashi Kurafuji; Masaru Haraguchi; Masami Nakajima; Tetsu Nishijima; Tetsushi Tanizaki; Hiroyuki Yamasaki; Takeaki Sugimura; Yuta Imai; Masakatsu Ishizaki; Takeshi Kumaki; Kan Murata; Kanako Yoshida; et al. (IEEE J. Solid State Circuits, 2011)

Estimation of a large relative rotation between two images of a fast spinning marker-less golf ball. - Yuta Imai; Shingo Kagami; Koichi Hashimoto (SII, 2016)

Serverless Architecture for Service Robot Management System. - Kenji Nishimiya; Yuta Imai (ICRA, 2021)