Decision Forest Training Accelerator Based on Binary Feature Decomposition. - Thiem Van Chu; Yu Mizutani; Yuta Nagahara; Shungo Kumazawa; Kazushi Kawamura; Jaehoon Yu; Masato Motomura (FCCM, 2023)

Sparse-Sparse Matrix Multiplication Accelerator on FPGA featuring Distribute-Merge Product Dataflow. - Yuta Nagahara; Jiale Yan; Kazushi Kawamura; Masato Motomura; Thiem Van Chu (ASPDAC, 2024)

Efficient COO to CSR Conversion for Accelerating Sparse Matrix Processing on FPGA. - Yuta Nagahara; Jiale Yan; Kazushi Kawamura; Masato Motomura; Thiem Van Chu (ICCE, 2024)

BingoGCN: Towards Scalable and Efficient GNN Acceleration with Fine-Grained Partitioning and SLT. - Jiale Yan; Hiroaki Ito; Yuta Nagahara; Kazushi Kawamura; Masato Motomura; Thiem Van Chu; Daichi Fujiki (ISCA, 2025)

DMSA: An Efficient Architecture for Sparse-Sparse Matrix Multiplication Based on Distribute-Merge Product Dataflow. - Yuta Nagahara; Jiale Yan; Kazushi Kawamura; Daichi Fujiki; Masato Motomura; Thiem Van Chu (IEEE Trans. Very Large Scale Integr. Syst., 2025)