Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation. - Shuichi Nagasawa; Masamitsu Tanaka; Naoki Takeuchi; Yuki Yamanashi; Shigeyuki Miyajima; Fumihiro China; Taiki Yamae; Koki Yamazaki; Yuta Somei; Naonori Sega; Yoshinao Mizugaki; Hiroaki Myoren; et al. (IEICE Trans. Electron., 2021)

Evaluation of a True Random Number Generator Utilizing Timing Jitters in RSFQ Logic Circuits. - Kenta Sato; Naonori Sega; Yuta Somei; Hiroshi Shimada; Takeshi Onomi; Yoshinao Mizugaki (IEICE Trans. Electron., 2022)