Scalability and design-space analysis of a 1T-1MTJ memory cell. - Richard Dorrance; Fengbo Ren; Yuta Toriyama; Amr Amin Hafez; Chih-Kong Ken Yang; Dejan Markovic (NANOARCH, 2011)

A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs). - Fengbo Ren; Henry Park; Richard Dorrance; Yuta Toriyama; Chih-Kong Ken Yang; Dejan Markovic (ISQED, 2012)

Field-order based hardware cost analysis of non-binary LDPC decoders. - Yuta Toriyama; Behzad Amiri; Lara Dolecek; Dejan Markovic (ACSSC, 2014)

Logarithmic quantization scheme for reduced hardware cost and improved error floor in non-binary LDPC decoders. - Yuta Toriyama; Behzad Amiri; Lara Dolecek; Dejan Markovic (GLOBECOM, 2014)

High-Performance and Energy-Efficient Decoder Design for Non-Binary LDPC Codes. - Yuta Toriyama (2016)

A 2.267-Gb/s, 93.7-pJ/bit Non-Binary LDPC Decoder With Logarithmic Quantization and Dual-Decoding Algorithm Scheme for Storage Applications. - Yuta Toriyama; Dejan Markovic (IEEE J. Solid State Circuits, 2018)