FPGA Design for PCANet Deep Learning Network. - Yuteng Zhou; Wei Wang 053; Xinming Huang 001 (FCCM, 2015)

A pipeline architecture for traffic sign classification on an FPGA. - Yuteng Zhou; Zhilu Chen; Xinming Huang 001 (ISCAS, 2015)

A system-on-chip FPGA design for real-time traffic signal recognition system. - Yuteng Zhou; Zhilu Chen; Xinming Huang 001 (ISCAS, 2016)

An FPGA prototype of dual link algorithm for MIMO interference network. - Mingda Zhou; Xinming Huang 001; Yuteng Zhou; Xing Li; Youjian Liu (ICASSP, 2017)

Deep learning binary neural network on an FPGA. - Yuteng Zhou; Shrutika Redkar; Xinming Huang 001 (MWSCAS, 2017)

VLSI design of a power-efficient object detector using PCANet. - Yuteng Zhou; Xinming Huang 001 (IEICE Electron. Express, 2018)

A 20 TOp/s/W Binary Neural Network Accelerator. - Xinming Huang 001; Yuteng Zhou (ISCAS, 2019)

RoadNet: An 80-mW Hardware Accelerator for Road Detection. - Yuteng Zhou; Yecheng Lyu; Xinming Huang 001 (IEEE Embed. Syst. Lett., 2019)