GTuner: tuning DNN computations on GPU via graph attention network. - Qi Sun 002; Xinyun Zhang; Hao Geng; Yuxuan Zhao 001; Yang Bai; Haisheng Zheng; Bei Yu 001 (DAC, 2022)

Mixed-Cell-Height Legalization on CPU-GPU Heterogeneous Systems. - Haoyu Yang; Kit Fung; Yuxuan Zhao 001; Yibo Lin; Bei Yu 001 (DATE, 2022)

AutoGraph: Optimizing DNN Computation Graph for Parallel GPU Kernel Execution. - Yuxuan Zhao 001; Qi Sun 002; Zhuolun He; Yang Bai; Bei Yu 001 (AAAI, 2023)

Analytical Die-to-Die 3D Placement with Bistratal Wirelength Model and GPU Acceleration. - Peiyu Liao; Yuxuan Zhao 001; Dawei Guo; Yibo Lin; Bei Yu 001 (CoRR, 2023)

Analytical Heterogeneous Die-to-Die 3D Placement with Macros. - Yuxuan Zhao 001; Peiyu Liao; Siting Liu 002; Jiaxi Jiang; Yibo Lin; Bei Yu 001 (CoRR, 2024)

Analytical Die-to-Die 3-D Placement With Bistratal Wirelength Model and GPU Acceleration. - Peiyu Liao; Yuxuan Zhao 001; Dawei Guo; Yibo Lin; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Invited: Physical Design for Advanced 3D ICs: Challenges and Solutions. - Yuxuan Zhao 001; Lancheng Zou; Bei Yu 001 (ISPD, 2025)

Analytical Heterogeneous Die-to-Die 3-D Placement With Macros. - Yuxuan Zhao 001; Peiyu Liao; Siting Liu 002; Jiaxi Jiang; Yibo Lin; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis. - Xun Jiang 002; Haoran Lu; Yuxuan Zhao 001; Jiarui Wang; Zizheng Guo; Heng Wu 007; Bei Yu 001; Sung Kyu Lim; Runsheng Wang; Ru Huang 001; Yibo Lin (CoRR, 2025)

Evolution of Optimization Algorithms for Global Placement via Large Language Models. - Xufeng Yao; Jiaxi Jiang; Yuxuan Zhao 001; Peiyu Liao; Yibo Lin; Bei Yu 001 (CoRR, 2025)