Accurate and Fast Performance Modeling of Processors with Decoupled Front-end. - Yuya Degawa; Toru Koizumi 001; Tomoki Nakamura; Ryota Shioya; Junichiro Kadomoto; Hidetsugu Irie; Shuichi Sakai (ICCD, 2021)

T-SKID: Predicting When to Prefetch Separately from Address Prediction. - Toru Koizumi 001; Tomoki Nakamura; Yuya Degawa; Hidetsugu Irie; Shuichi Sakai; Ryota Shioya (DATE, 2022)

Clockhands: Rename-free Instruction Set Architecture for Out-of-order Processors. - Toru Koizumi 001; Ryota Shioya; Shu Sugita; Taichi Amano; Yuya Degawa; Junichiro Kadomoto; Hidetsugu Irie; Shuichi Sakai (MICRO, 2023)

A Principal Factor of Performance in Decoupled Front-End. - Yuya Degawa; Toru Koizumi 001; Tomoki Nakamura; Ryota Shioya; Junichiro Kadomoto; Hidetsugu Irie; Shuichi Sakai (IEICE Trans. Inf. Syst., 2023)

Branch Divergence-Aware Flexible Approximating Technique on GPUs. - Reoma Matsuo; Yuya Degawa; Hidetsugu Irie; Shuichi Sakai; Ryota Shioya (COOL CHIPS, 2024)

Cycle-Oriented Dynamic Approximation: Architectural Framework to Meet Performance Requirements. - Yuya Degawa; Shota Suzuki; Junichiro Kadomoto; Hidetsugu Irie; Shuichi Sakai (IEEE Comput. Archit. Lett., 2024)

Flexible Approximate Computing for Mitigating Branch Divergence in GPUs. - Reoma Matsuo; Yuya Degawa; Hidetsugu Irie; Shuichi Sakai; Ryota Shioya (IEEE Micro, 2025)