VLSI architecture based on packet data transfer scheme and its application. - Yuya Homma; Michitaka Kameyama; Yoshichika Fujioka; Nobuhiro Tomabechi (ISCAS (2), 2005)

Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer. - Tomoaki Hasegawa; Yuya Homma; Michitaka Kameyama (ISMVL, 2005)