Evaluation of issue queue delay: Banking tag RAM and identifying correct critical path. - Kyohei Yamaguchi; Yuya Kora; Hideki Ando (ICCD, 2011)

Delay Evaluation of Issue Queue in Superscalar Processors with Banking Tag RAM and Correct Critical Path Identification. - Kyohei Yamaguchi; Yuya Kora; Hideki Ando (IEICE Trans. Inf. Syst., 2012)

MLP-aware dynamic instruction window resizing for adaptively exploiting both ILP and MLP. - Yuya Kora; Kyohei Yamaguchi; Hideki Ando (MICRO, 2013)

MLP-Aware Dynamic Instruction Window Resizing in Superscalar Processors for Adaptively Exploiting Available Parallelism. - Yuya Kora; Kyohei Yamaguchi; Hideki Ando (IEICE Trans. Inf. Syst., 2014)