Trade-off analysis of fine-grained power gating methods for functional units in a CPU. - Weihan Wang; Yuya Ohta; Yoshifumi Ishii; Kimiyoshi Usami; Hideharu Amano (COOL Chips, 2012)

Fine-Grained Run-Tume Power Gating through Co-optimization of Circuit, Architecture, and System Software Design. - Hiroshi Nakamura; Weihan Wang; Yuya Ohta; Kimiyoshi Usami; Hideharu Amano; Masaaki Kondo; Mitaro Namiki (IEICE Trans. Electron., 2013)