FPGP: Graph Processing Framework on FPGA A Case Study of Breadth-First Search. - Guohao Dai; Yuze Chi; Yu Wang 002; Huazhong Yang (FPGA, 2016)

NXgraph: An efficient graph processing system on a single machine. - Yuze Chi; Guohao Dai; Yu Wang 002; Guangyu Sun 003; Guoliang Li 001; Huazhong Yang (ICDE, 2016)

ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture. - Guohao Dai; Tianhao Huang; Yuze Chi; Ningyi Xu; Yu Wang 002; Huazhong Yang (FPGA, 2017)

An Optimal Microarchitecture for Stencil Computation with Data Reuse and Fine-Grained Parallelism: (Abstract Only). - Yuze Chi; Peipei Zhou 001; Jason Cong (FPGA, 2018)

SODA: stencil with optimized dataflow architecture. - Yuze Chi; Jason Cong; Peng Wei 004; Peipei Zhou 001 (ICCAD, 2018)

Rapid Cycle-Accurate Simulator for High-Level Synthesis. - Yuze Chi; Young-kyu Choi; Jason Cong; Jie Wang 022 (FPGA, 2019)

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing. - Yi-Hsiang Lai; Yuze Chi; Yuwei Hu; Jie Wang 022; Cody Hao Yu; Yuan Zhou; Jason Cong; Zhiru Zhang (FPGA, 2019)

GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing. - Guohao Dai; Tianhao Huang; Yuze Chi; Jishen Zhao; Guangyu Sun 003; Yongpan Liu; Yu Wang 002; Yuan Xie 001; Huazhong Yang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Exploiting Computation Reuse for Stencil Accelerators. - Yuze Chi; Jason Cong (DAC, 2020)

Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. - Licheng Guo; Jason Lau; Yuze Chi; Jie Wang 022; Cody Hao Yu; Zhe Chen 030; Zhiru Zhang; Jason Cong (FPGA, 2020)

HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration. - Jiajie Li; Yuze Chi; Jason Cong (FPGA, 2020)

When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization. - Young-kyu Choi; Yuze Chi; Jie Wang 022; Licheng Guo; Jason Cong (CoRR, 2020)

FLASH: Fast, Parallel, and Accurate Simulator for HLS. - Young-kyu Choi; Yuze Chi; Jie Wang 022; Jason Cong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Extending High-Level Synthesis for Task-Parallel Programs. - Yuze Chi; Licheng Guo; Jason Lau; Young-kyu Choi; Jie Wang 022; Jason Cong (FCCM, 2021)

Extending High-Level Synthesis for Task-Parallel Programs. - Yuze Chi; Licheng Guo; Young-kyu Choi; Jie Wang 022; Jason Cong (FPGA, 2021)

HBM Connect: High-Performance HLS Interconnect for FPGA HBM. - Young-kyu Choi; Yuze Chi; Weikang Qiao; Nikola Samardzic; Jason Cong (FPGA, 2021)

AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs. - Licheng Guo; Yuze Chi; Jie Wang 022; Jason Lau; Weikang Qiao; Ecenur Ustun; Zhiru Zhang; Jason Cong (FPGA, 2021)

SPA-GCN: Efficient and Flexible GCN Accelerator with an Application for Graph Similarity Computation. - Atefeh Sohrabizadeh; Yuze Chi; Jason Cong (CoRR, 2021)

Design Automation and Optimization for Memory-Bound Application Accelerators. - Yuze Chi (2021)

StreamGCN: Accelerating Graph Convolutional Networks with Streaming Processing. - Atefeh Sohrabizadeh; Yuze Chi; Jason Cong (CICC, 2022)

Serpens: a high bandwidth memory based accelerator for general-purpose sparse matrix-vector multiplication. - Linghao Song; Yuze Chi; Licheng Guo; Jason Cong (DAC, 2022)

Accelerating SSSP for Power-Law Graphs. - Yuze Chi; Licheng Guo; Jason Cong (FPGA, 2022)

RapidStream: Parallel Physical Implementation of FPGA HLS Designs. - Licheng Guo; Pongstorn Maidee; Yun Zhou; Chris Lavin; Jie Wang 022; Yuze Chi; Weikang Qiao; Alireza Kaviani; Zhiru Zhang; Jason Cong (FPGA, 2022)

SPA-GCN: Efficient and Flexible GCN Accelerator with Application for Graph Similarity Computation. - Atefeh Sohrabizadeh; Yuze Chi; Jason Cong (FPGA, 2022)

Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication. - Linghao Song; Yuze Chi; Atefeh Sohrabizadeh; Young-kyu Choi; Jason Lau; Jason Cong (FPGA, 2022)

PYXIS: An Open-Source Performance Dataset Of Sparse Accelerators. - Linghao Song; Yuze Chi; Jason Cong (ICASSP, 2022)

PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. - Moazin Khatti; Xingyu Tian; Yuze Chi; Licheng Guo; Jason Cong; Zhenman Fang (FCCM, 2023)

Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. - Linghao Song; Licheng Guo; Suhail Basalama; Yuze Chi; Robert F. Lucas; Jason Cong (FPGA, 2023)

Democratizing Domain-Specific Computing. - Yuze Chi; Weikang Qiao; Atefeh Sohrabizadeh; Jie Wang 022; Jason Cong (Commun. ACM, 2023)

SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs. - Xingyu Tian; Zhifan Ye; Alec Lu; Licheng Guo; Yuze Chi; Zhenman Fang (ACM Trans. Reconfigurable Technol. Syst., 2023)

TARO: Automatic Optimization for Free-Running Kernels in FPGA High-Level Synthesis. - Young Kyu Choi; Yuze Chi; Jason Lau; Jason Cong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design. - Licheng Guo; Yuze Chi; Jason Lau; Linghao Song; Xingyu Tian; Moazin Khatti; Weikang Qiao; Jie Wang 022; Ecenur Ustun; Zhenman Fang; Zhiru Zhang; Jason Cong (ACM Trans. Reconfigurable Technol. Syst., 2023)

RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration. - Licheng Guo; Pongstorn Maidee; Yun Zhou; Chris Lavin; Eddie Hung; Wuxi Li; Jason Lau; Weikang Qiao; Yuze Chi; Linghao Song; Yuanlong Xiao; Alireza Kaviani; et al. (ACM Trans. Reconfigurable Technol. Syst., 2023)

TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. - Neha Prakriya; Yuze Chi; Suhail Basalama; Linghao Song; Jason Cong (ASPLOS (3), 2024)

RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis. - Jason Lau; Yuanlong Xiao; Yutong Xie 011; Yuze Chi; Linghao Song; Shaojie Xiang; Michael Lo; Zhiru Zhang; Jason Cong; Licheng Guo (ICCAD, 2024)

PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. - Moazin Khatti; Xingyu Tian; Ahmad Sedigh Baroughi; Akhil Raj Baranwal; Yuze Chi; Licheng Guo; Jason Cong; Zhenman Fang (ACM Trans. Reconfigurable Technol. Syst., 2024)

NoH: NoC Compilation in High-Level Synthesis. - Huifeng Ke; Sihao Liu; Licheng Guo; Zifan He; Linghao Song; Suhail Basalama; Yuze Chi; Tony Nowatzki; Jason Cong (FCCM, 2025)