An 80-ns 1-Mb flash memory with on-chip erase/erase-verify controller. - Koichi Seki; Hitoshi Kume; Yuzuru Ohji; Takashi Kobayashi 002; Atushi Hiraiwa; Takeshi Nishida; Takeshi Wada; Kazuhiro Komori; Kazuto Izawa; Toshiaki Nishimoto; Yasuroh Kubota; Kazuyoshi Shoji (IEEE J. Solid State Circuits, 1990)

VLSI reliability challenges: from device physics to wafer scale systems. - Eiji Takeda; Kunihiko Ikuzaki; Hisao Katto; Yuzuru Ohji; Kenji Hinode; Akemi Hamada; Toshiyuki Sakuta; Takahiro Funabiki; Toshio Sasaki (Proc. IEEE, 1993)

256-Mb DRAM circuit technologies for file applications. - Goro Kitsukawa; Masashi Horiguchi; Yoshiki Kawajiri; Takayuki Kawahara; Takesada Akiba; Yasushi Kawase; Toshikazu Tachibana; Takeshi Sakai; Masakazu Aoki; Syoji Shukuri; Kazuhiko Sagara; Ryo Nagai; et al. (IEEE J. Solid State Circuits, 1993)

An SOI-Based 7.5µm-Thick 0.15x0.15mm2 RFID Chip. - Mitsuo Usami; Akira Sato; Hisao Tanabe; Toshiaki Iwamatsu; Shigeto Maegawa; Yuzuru Ohji (ISSCC, 2006)