A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis. - Yuzuru Shizuku; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa; Mitsuji Okada (NEWCAS, 2014)

A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs. - Ryo Matsuzuka; Tetsuya Hirose; Yuzuru Shizuku; Nobutaka Kuroki; Masahiro Numa (ISCAS, 2015)

Energy-efficient AES SubBytes transformation circuit using asynchronous circuits for ultra-low voltage operation. - Yuzuru Shizuku; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa; Mitsuji Okada (IEICE Electron. Express, 2015)

An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs. - Yuzuru Shizuku; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa; Mitsuji Okada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)

An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs. - Ryo Matsuzuka; Tetsuya Hirose; Yuzuru Shizuku; Kyohei Shinonaga; Nobutaka Kuroki; Masahiro Numa (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)