A 5-V CMOS line controller with 16-b audio converters. - Loic Le Toumelin; Pierre Carbou; Yves Leduc; Pascal Guignon; Jan Oredsson; Anders Lindberg (IEEE J. Solid State Circuits, 1992)

Ultra-Low-Power Radio Microphone for Cochlear Implant Application. - Yannick Vaiarello; William Tatinian; Yves Leduc; Nicolas Veau; Gilles Jacquemod (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

Ultra-Low-Power Audio Communication System for Cochlear Implant Application. - Yannick Vaiarello; William Tatinian; Yves Leduc; Nicolas Veau; Gilles Jacquemod (J. Low Power Electron., 2012)

VCO design in SOI technologies. - Alexandre Fonseca; Gilles Jacquemod; Yves Leduc; Emeric de Foucauld; Philippe Lorenzini (NEWCAS, 2014)

New QVCO design using UTBB FDSOI technology. - Gilles Jacquemod; Zhaopeng Wei; Yves Leduc; Cyril Jacquemod (EWME, 2016)

UTBB-FDSOI complementary logic for high quality analog signal processing. - Zhaopeng Wei; Yves Leduc; Gilles Jacquemod; Emeric de Foucauld (ICECS, 2016)

Study and Reduction of Variability in 28 nm Fully Depleted Silicon on Insulator Technology. - Zhaopeng Wei; Gilles Jacquemod; Philippe Lorenzini; Frédéric Hameau; Emeric de Foucauld; Yves Leduc (J. Low Power Electron., 2016)

Programmable signal generator for neural network application. - Hassan Jouni; Adnan Harb; Gilles Jacquemod; Yves Leduc (ICM, 2017)

Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology. - Zhaopeng Wei; Yves Leduc; Emeric de Foucauld; Gilles Jacquemod (NEWCAS, 2017)

Creation of Real Blocks for Neural Network Using Simulink. - Hassan Jouni; Adnan Harb; Gilles Jacquemod; Yves Leduc (ICCA, 2018)

Effect of SSN on signal and power integrity on 32-bit microcontroller : Modeling and correlation. - Mélanie Moign; Jean-Pierre Leca; Nicolas Froidevaux; Yves Leduc; Gilles Jacquemod (PRIME, 2019)

New design of analog and mixed-signal cells using back-gate cross-coupled structure. - Gilles Jacquemod; Zhaopeng Wei; Yves Leduc; Emeric de Foucauld; Jérôme Prouvée; B. Blampey (VLSI-SoC, 2019)

New design of an ultra low power CDR architecture using FDSOI 28 nm technology. - Yuqing Mao; Yoann Charlon; Yves Leduc; Gilles Jacquemod (NEWCAS, 2023)