Architectures for Mass Market 3D Displays. - Paul Winser; Thierry Bonnet; Dominique Dumont; Yves Mathieu (Eurographics, 1988)

A coprocessor for real-time MPEG4 facial animation on mobiles. - Christophe Cunat; Jean Gobert; Yves Mathieu (ESTIMedia, 2003)

CMOS Structures Suitable for Secured Hardware. - Sylvain Guilley; Philippe Hoogvorst; Yves Mathieu; Renaud Pacalet; Jean Provost (DATE, 2004)

The "Backend Duplication" Method. - Sylvain Guilley; Philippe Hoogvorst; Yves Mathieu; Renaud Pacalet (CHES, 2005)

Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. - Sylvain Guilley; Florent Flament; Philippe Hoogvorst; Renaud Pacalet; Yves Mathieu (IEEE Des. Test Comput., 2007)

Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs. - Sylvain Guilley; Laurent Sauvage; Jean-Luc Danger; Tarik Graba; Yves Mathieu (SSIRI, 2008)

Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints. - Laurent Sauvage; Sylvain Guilley; Jean-Luc Danger; Yves Mathieu; Maxime Nassar (DATE, 2009)

High Efficiency Reconfigurable Cache for Image Processing. - Zahir Larabi; Yves Mathieu; Stéphane Mancini (ERSA, 2009)

Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. - Shivam Bhasin; Jean-Luc Danger; Florent Flament; Tarik Graba; Sylvain Guilley; Yves Mathieu; Maxime Nassar; Laurent Sauvage; Nidhal Selmane (ReConFig, 2009)

DPL on Stratix II FPGA: What to Expect?. - Laurent Sauvage; Maxime Nassar; Sylvain Guilley; Florent Flament; Jean-Luc Danger; Yves Mathieu (ReConFig, 2009)

Efficient Data Access Management for FPGA-Based Image Processing SoCs. - Zahir Larabi; Yves Mathieu; Stéphane Mancini (IEEE International Workshop on Rapid System Prototyping, 2009)

Electromagnetic Radiations of FPGAs: High Spatial Resolution Cartography and Attack on a Cryptographic Module. - Laurent Sauvage; Sylvain Guilley; Yves Mathieu (ACM Trans. Reconfigurable Technol. Syst., 2009)

Balancing exploration and exploitation in an adaptive three-dimensional cellular genetic algorithm via a probabilistic selection operator. - Asmaa Al-Naqi; Ahmet T. Erdogan; Tughrul Arslan; Yves Mathieu (AHS, 2010)

Calibrating a predictive cache emulator for SoC design. - Stéphane Mancini; Lionel Pierrefeu; Zahir Larabi; Yves Mathieu (AHS, 2010)

Cross-Correlation Cartography. - Laurent Sauvage; Sylvain Guilley; Florent Flament; Jean-Luc Danger; Yves Mathieu (ReConFig, 2010)

Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics. - Laurent Sauvage; Maxime Nassar; Sylvain Guilley; Florent Flament; Jean-Luc Danger; Yves Mathieu (Int. J. Reconfigurable Comput., 2010)

A dual threshold voltage technique for glitch minimization. - Mariem Slimani; Philippe Matherat; Yves Mathieu (ICECS, 2012)

Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography. - Laurent Sauvage; Sylvain Guilley; Florent Flament; Jean-Luc Danger; Yves Mathieu (Int. J. Reconfigurable Comput., 2012)

Exploration of 3D grid caching strategies for ray-shooting. - Stéphane Mancini; Zahir Larabi; Yves Mathieu; Tomasz Toczek; Lionel Pierrefeu (J. Real Time Image Process., 2012)

Graphics Composition for Multiview Displays. - Jean Le Feuvre; Yves Mathieu (Emerging Technologies for 3D Video, 2013)

Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA. - Zouha Cherif; Jean-Luc Danger; Florent Lozach; Yves Mathieu; Lilian Bossuet (HASP@ISCA, 2013)

Design methodology of an ASIC TRNG based on an open-loop delay chain. - Molka Ben-Romdhane; Tarik Graba; Jean-Luc Danger; Yves Mathieu (NEWCAS, 2013)

Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology. - Shivam Bhasin; Jean-Luc Danger; Tarik Graba; Yves Mathieu; Daisuke Fujimoto; Makoto Nagata (ES4CPS@DATE, 2014)

Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security. - Emna Amouri; Shivam Bhasin; Yves Mathieu; Tarik Graba; Jean-Luc Danger; Habib Mehrez (FPL, 2014)

Cryptographically secure shields. - Jean-Michel Cioranesco; Jean-Luc Danger; Tarik Graba; Sylvain Guilley; Yves Mathieu; David Naccache; Xuan Thuy Ngo (HOST, 2014)

Countering early propagation and routing imbalance of DPL designs in a tree-based FPGA. - Emna Amouri; Shivam Bhasin; Yves Mathieu; Tarik Graba; Jean-Luc Danger (ICICDT, 2015)

Multi-Valued Routing Tracks for FPGAs in 28nm FDSOI Technology. - Sumanta Chaudhuri; Tarik Graba; Yves Mathieu (CoRR, 2016)

Cryptographically Secure Shield for Security IPs Protection. - Xuan Thuy Ngo; Jean-Luc Danger; Sylvain Guilley; Tarik Graba; Yves Mathieu; Zakaria Najm; Shivam Bhasin (IEEE Trans. Computers, 2017)

Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. - Jean-Luc Danger; Risa Yashiro; Tarik Graba; Yves Mathieu; Abdelmalek Si-Merabet; Kazuo Sakiyama; Noriyuki Miura; Makoto Nagata (DSD, 2018)

Pre-silicon Embedded System Evaluation as New EDA Tool for Security Verification. - Sofiane Takarabt; Kais Chibani; Adrien Facon; Sylvain Guilley; Yves Mathieu; Laurent Sauvage; Youssef Souissi (IVSW, 2018)

Cache-Timing Attacks Still Threaten IoT Devices. - Sofiane Takarabt; Alexander Schaub 001; Adrien Facon; Sylvain Guilley; Laurent Sauvage; Youssef Souissi; Yves Mathieu (C2SI, 2019)

High Throughput/Gate AES Hardware Architectures Based on Datapath Compression. - Rei Ueno; Naofumi Homma; Sumio Morioka; Noriyuki Miura; Kohei Matsuda; Makoto Nagata; Shivam Bhasin; Yves Mathieu; Tarik Graba; Jean-Luc Danger (IEEE Trans. Computers, 2020)

Formal Evaluation and Construction of Glitch-resistant Masked Functions. - Sofiane Takarabt; Sylvain Guilley; Youssef Souissi; Khaled Karray; Laurent Sauvage; Yves Mathieu (HOST, 2021)

Diffusional Side-Channel Leakage From Unrolled Lightweight Block Ciphers: A Case Study of Power Analysis on PRINCE. - Ville Yli-Mäyry; Rei Ueno; Noriyuki Miura; Makoto Nagata; Shivam Bhasin; Yves Mathieu; Tarik Graba; Jean-Luc Danger; Naofumi Homma (IEEE Trans. Inf. Forensics Secur., 2021)

Jitter Compensation Mechanism for Dynamic Deterministic Networks. - Guillaume Soudais; Tarik Graba; Yves Mathieu; Sébastien Bigo (OFC, 2023)