Execution Environment for ELECTRE Applications. - Denis Creusot; Philippe Lemoine; Olivier F. Roux; Yvon Trinquet; Antonio Kung; Olivier Marbach; Carlos Serrano-Morales (ESEC, 1991)

The SCEPTRE2 Communication Service In A Fault Tolerance Context. - Soraya Bestaoui; Anne-Marie Déplanche; Yvon Trinquet (PDP, 1994)

Implementing a Semi-Active Replication Strategy in CHORUS/ClassiX, A Distributed Real-Time Executive. - Anne-Marie Déplanche; Pierre-Yves Théaudière; Yvon Trinquet (SRDS, 1999)

Operative architecture design and modelling for the validation of real-time applications. - Sébastien Faucou; Anne-Marie Déplanche; Yvon Trinquet (ETFA (2), 2001)

Timing fault detection for safety-critical real-time embedded systems. - Sébastien Faucou; Anne-Marie Déplanche; Yvon Trinquet (ACM SIGOPS European Workshop, 2002)

Response time calculations for non-preemptive tasks with variable execution time. - Imad Alzeer; Pierre Molinaro; Yvon Trinquet (ETFA (1), 2003)

Decomposition and Learning for a Hard Real Time Task Allocation Problem. - Hadrien Cambazard; Pierre-Emmanuel Hladik; Anne-Marie Déplanche; Narendra Jussien; Yvon Trinquet (CP, 2004)

EAST-ADL - An Architecture Description Language - Validation and Verification Aspects. - Vincent Debruyne; Françoise Simonot-Lion; Yvon Trinquet (IFIP-WADL, 2004)

An ADL Centric Approach for the Formal Design of Real-Time Systems. - Sébastien Faucou; Anne-Marie Déplanche; Yvon Trinquet (IFIP-WADL, 2004)

Designing Low Parametric Sensitivity FWL Realizations of LTI Controllers/Filters within the Implicit State-Space Framework. - Thibault Hilaire; Philippe Chevrel; Yvon Trinquet (CDC/ECC, 2005)

Trampoline An Open Source Implementation of the OSEK/VDX RTOS Specification. - Jean-Luc Béchennec; Mikaël Briday; Sébastien Faucou; Yvon Trinquet (ETFA, 2006)

Adequacy between AUTOSAR OS specification and real-time scheduling theory. - Pierre-Emmanuel Hladik; Anne-Marie Déplanche; Sébastien Faucou; Yvon Trinquet (SIES, 2007)

Code Generation from AADL to a Real-Time Operating System: An Experimentation Feedback on the Use of Model Transformation. - Matthias Brun 001; Jérôme Delatour; Yvon Trinquet (ICECCS, 2008)

Simulator generation using an automaton based pipeline model for timing analysis. - Rola Kassem; Mikaël Briday; Jean-Luc Béchennec; Yvon Trinquet; Guillaume Savaton (IMCSIT, 2008)

An Analysis of the AUTOSAR OS Timing Protection Mechanism. - Dominique Bertrand; Sébastien Faucou; Yvon Trinquet (ETFA, 2009)

Instruction set simulator generation using HARMLESS, a new hardware architecture description language. - Rola Kassem; Mikaël Briday; Jean-Luc Béchennec; Yvon Trinquet; Guillaume Savaton (SimuTools, 2009)

Temporal isolation for the cohabitation of applications in automotive embedded software. - Dominique Bertrand; Sébastien Faucou; Yvon Trinquet (EDCC-CARS, 2010)

STORM a simulation tool for real-time multiprocessor scheduling evaluation. - Richard Urunuela; Anne-Marie Déplanche; Yvon Trinquet (ETFA, 2010)

Étude comparative pour la modélisation de plates-formes d'exécution. Application au temps réel embarqué. - Matthias Brun 001; Jérôme Delatour; Yvon Trinquet; Frédéric Thomas; Sébastien Gérard (Tech. Sci. Informatiques, 2010)

Overhead control in real-time global scheduling. - Muhammad Naeem Shehzad; Anne-Marie Déplanche; Yvon Trinquet; Richard Urunuela (RTNS, 2011)

Efficiency evaluation of overhead control heuristics in DP-Fair multiprocessor scheduling. - Muhammad Naeem Shehzad; Anne-Marie Déplanche; Yvon Trinquet; Richard Urunuela (ETFA, 2012)

A Data Flow Monitoring Service Based on Runtime Verification for AUTOSAR. - Sylvain Cotard; Sébastien Faucou; Jean-Luc Béchennec; Audrey Queudet; Yvon Trinquet (HPCC-ICESS, 2012)

Harmless, a hardware architecture description language dedicated to real-time embedded system simulation. - Rola Kassem; Mikaël Briday; Jean-Luc Béchennec; Guillaume Savaton; Yvon Trinquet (J. Syst. Archit., 2012)

Overhead Control in DP-Fair Work Conserving Real-Time Multiprocessor Scheduling. - Muhammad Naeem Shehzad; Anne-Marie Déplanche; Yvon Trinquet; Richard Urunuela (Modeling Approaches and Algorithms for Advanced Computer Applications, 2013)

Improving processor hardware compiled cycle accurate simulation using program abstraction. - Adrien Bullich; Mikaël Briday; Jean-Luc Béchennec; Yvon Trinquet (SimuTools, 2014)

STM-HRT: A Robust and Wait-Free STM for Hard Real-Time Multicore Embedded Systems. - Sylvain Cotard; Audrey Queudet; Jean-Luc Béchennec; Sébastien Faucou; Yvon Trinquet (ACM Trans. Embed. Comput. Syst., 2015)

Overhead Control Heuristics in Boundary Fair Real-Time Multiprocessor Scheduling. - Muhammad Naeem Shehzad; Anne-Marie Déplanche; Yvon Trinquet; Richard Urunuela (CSE/EUC (2), 2017)