AFTAB: A RISC-V Implementation with Configurable Gateways for Security. - Maryam Rajabalipanah; Mahboobe Sadeghipour Roodsari; Zahra Jahanpeima; Gianluca Roascio; Paolo Prinetto; Zainalabedin Navabi (EWDTS, 2021)

HIRMA: High-Performance Implementation for RISC-V Microcontroller Applications. - Negin Safari; Amirmahdi Joudi; Maryam Rajabalipanah; Zahra Jahanpeima; Hasan Sadeghzadeh; Zainalabedin Navabi (EWDTS, 2023)

Sharing AES Engine for RISC-V Custom Instructions Performing Encryption and Decryption. - Zahra Hojati; Zahra Jahanpeima; Maryam Rajabalipanah; Hossein Ta'ati; Atefe Rabiei; Zainalabedin Navabi (EWDTS, 2024)

Domain-Specific Design Abstraction with Emphasis on Neural Networks. - Maryam Rajabalipanah; Zahra Hojati; Zahra Jahanpeima; Zainalabedin Navabi (DDECS, 2025)

European Test Symposium Teams: an Anniversary Snapshot. - Maksim Jenihhin; Jaan Raik; Artur Jutman; Natalia Cherezova; Raimund Ubar; Liviu Miclea; Szilárd Enyedi; I. Stefan; Ovidiu Stan; Cosmina Corches; Z. Peng; Petru Eles; et al. (ETS, 2025)