A 2RW Dual-Port 8T-SRAM Macro with Bitline Leakage Current Tracking and Read-Write Arbitration. - Chenghu Dai; Junbo Chen; Lian Liu; Zaihang Zhang; Licai Hao; Wei Hu; Chunyu Peng; Wenjuan Lu; Zhiting Lin; Xiulong Wu (ISCAS, 2026)