Design of a linearly increasing inrush current limit circuit for DC-DC boost regulators. - Khondker Zakir Ahmed 001; Muhammad Shahidul Islam; Syed Mustafa Khelat Bari; Mohammad Riazur Rahman Mazumder; A. B. M. Harun-ur Rashid (APCCAS, 2010)

Implementation of highly accurate NMOS Vt based clamping technique in low current comparator. - Syed Mustafa Khelat Bari; Didar Islam; Khondker Zakir Ahmed 001 (APCCAS, 2010)

Design and implementation of a 0.8 V input, 84% duty cycle, variable frequency step-up converter. - Mohiuddin Hafiz; Khondker Zakir Ahmed 001; Didar Islam; A. B. M. Harun-ur Rashid (Microelectron. J., 2011)

Characterization of Inverse Temperature Dependence in logic circuits. - Minki Cho; Muhammad M. Khellah; Kwanyeob Chae; Khondker Zakir Ahmed 001; James W. Tschanz; Saibal Mukhopadhyay (CICC, 2012)

A 110nA synchronous boost regulator with autonomous bias gating for energy harvesting. - Khondker Zakir Ahmed 001; Saibal Mukhopadhyay (CICC, 2013)

An on-chip autonomous thermoelectric energy management system for energy-efficient active cooling. - Borislav Alexandrov; Khondker Zakir Ahmed 001; Saibal Mukhopadhyay (ISLPED, 2014)

(Invited paper) energy delivery for self-powered IoT devices. - Khondker Zakir Ahmed 001; Monodeep Kar; Saibal Mukhopadhyay (ASP-DAC, 2016)

Reconfigurable 96×128 active pixel sensor with 2.1µW/mm2 power generation and regulated multi-domain power delivery for self-powered imaging. - Khondker Zakir Ahmed 001; Mohammad Faisal Amir; Jong Hwan Ko; Saibal Mukhopadhyay (ESSCIRC, 2016)

A single-inductor-cascaded-stage topology for high conversion ratio boost regulator. - Khondker Zakir Ahmed 001; Saibal Mukhopadhyay (ICCD, 2016)

A Single-Chip Image Sensor Node With Energy Harvesting From a CMOS Pixel Array. - Jong Hwan Ko; Mohammad Faisal Amir; Khondker Zakir Ahmed 001; Taesik Na; Saibal Mukhopadhyay (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation. - Xiaosen Liu; Harish K. Krishnamurthy; Taesik Na; Sheldon Weng; Khondker Zakir Ahmed 001; Krishnan Ravichandran; James W. Tschanz; Vivek De (ISSCC, 2019)

A Variation-Adaptive Integrated Computational Digital LDO in 22nm CMOS with Fast Transient Response. - Zakir K. Ahmed 001; Harish K. Krishnamurthy; Charles Augustine; Xiaosen Liu; Sheldon Weng; Krishnan Ravichandran; James W. Tschanz; Vivek De (VLSI Circuits, 2019)

A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors. - Christopher Schaef; Kaladhar Radhakrishnan; Krishnan Ravichandran; James W. Tschanz; Vivek De; Nachiket V. Desai; Harish K. Krishnamurthy; Xiaosen Liu; Khondker Zakir Ahmed 001; Suhwan Kim 002; Sheldon Weng; Huong T. Do; et al. (IEEE J. Solid State Circuits, 2019)

Digital Control of Switching and Linear Integrated Voltage Regulators. - Harish K. Krishnamurthy; Zakir A. Khondker 001; Xiaosen Liu; Nachiket V. Desai; Suhwan Kim 002; Nicolas Butzen; Sally Amin; Sheldon Weng; Krishnan Ravichandran; James W. Tschanz; Vivek De (CICC, 2020)

An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering. - Zakir K. Ahmed 001; Harish K. Krishnamurthy; Sheldon Weng; Xiaosen Liu; Christopher Schaef; Nachiket V. Desai; Krishnan Ravichandran; James W. Tschanz; Vivek De (VLSI Circuits, 2020)

A Dual-Rail Hybrid Analog/Digital LDO with Dynamic Current Steering for Tunable High PSRR and High Efficiency. - Xiaosen Liu; Harish K. Krishnamurthy; Claudia P. Barrera; Jing Han; Rajasekhara M. Narayana Bhatla; Scott Chiu; Zakir K. Ahmed 001; Krishnan Ravichandran; James W. Tschanz; Vivek De (VLSI Circuits, 2020)

A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response. - Khondker Zakir Ahmed 001; Harish K. Krishnamurthy; Charles Augustine; Xiaosen Liu; Sheldon Weng; Krishnan Ravichandran; James W. Tschanz; Vivek De (IEEE J. Solid State Circuits, 2020)

17.4 Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing. - Nachiket V. Desai; Harish K. Krishnamurthy; Khondker Zakir Ahmed 001; Sheldon Weng; Suhwan Kim 002; Xiaosen Liu; Huong T. Do; Kaladhar Radhakrishnan; Krishnan Ravichandran; James W. Tschanz; Vivek De (ISSCC, 2021)

A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction. - Khondker Zakir Ahmed 001; Nachiket V. Desai; Harish K. Krishnamurthy; Sheldon Weng; Xiaosen Liu; Krishnan Ravichandran; James W. Tschanz; Vivek De (VLSI Circuits, 2021)

A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning. - Xiaosen Liu; Harish K. Krishnamurthy; Taesik Na; Sheldon Weng; Khondker Zakir Ahmed 001; Christopher Schaef; Krishnan Ravichandran; James W. Tschanz; Vivek De (IEEE J. Solid State Circuits, 2021)

A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer. - Xiaosen Liu; Harish Krishnamurthy; Renzhi Liu; Krishnan Ravichandran; Zakir K. Ahmed 001; Nachiket V. Desai; Nicolas Butzen; James W. Tschanz; Vivek De (ISSCC, 2022)

A Monolithic 26A/mm2Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC Converter. - Nicolas Butzen; Harish Krishnamurthy; Zakir K. Ahmed 001; Sheldon Weng; Krishnan Ravichandran; Michael Zelikson; James W. Tschanz; Jonathan Douglas (ISSCC, 2023)

28.4 A Monolithic 12.7W/mm2 Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter. - Nicolas Butzen; Harish Krishnamurthy; Jingshu Yu; Zakir K. Ahmed 001; Sheldon Weng; Krishnan Ravichandran; Ramez Hosseinian Ahangharnejhad; James Waldemer; Chris Pelto; James W. Tschanz (ISSCC, 2024)

14.9 A Monolithic 10.5W/mm2600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOS. - Suhwan Kim 002; Harish K. Krishnamurthy; Zakir K. Ahmed 001; Nachiket V. Desai; Sheldon Weng; Anne Augustine; Huong T. Do; Jingshu Yu; Phong D. Bach; Xiaosen Liu; Kaladhar Radhakrishnan; Krishnan Ravichandran; et al. (ISSCC, 2024)

A Monolithic 12.7 W/mm2, 92% Peak-Efficiency Switched-Capacitor DC-DC Converter Using CSCR-First Topology. - Nicolas Butzen; Harish K. Krishnamurthy; Jingshu Yu; Zakir K. Ahmed 001; Sheldon Weng; Krishnan Ravichandran; Ramez Hosseinian Ahangharnejhad; James Waldemer; Christopher Pelto; James W. Tschanz (IEEE J. Solid State Circuits, 2024)

8.8 Fine-Grained Spatial and Temporal Thermal Profiling of a 16nm CMOS Buck Converter and SoC Load-Current Emulator Using Low-Voltage Micron-Scale Thermal Sensors. - Zakir K. Ahmed 001; Suhwan Kim 002; Charles Augustine; Harish K. Krishnamurthy; Krishnan Ravichandran; James W. Tschanz; Vivek De (ISSCC, 2025)

A Monolithic, 10.5 W/mm2, 600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16 nm Class. - Suhwan Kim 002; Harish K. Krishnamurthy; Zakir K. Ahmed 001; Nachiket V. Desai; Sheldon Weng; Anne Augustine; Huong T. Do; Jingshu Yu; Phong D. Bach; Xiaosen Liu; Kaladhar Radhakrishnan; Krishnan Ravichandran; et al. (IEEE J. Solid State Circuits, 2025)