Practical Aspects of Logic Synthesis Based on Functional Decomposition. - Mariusz Rawski; Rafal Rzechowski; Zbigniew Jachna; Ireneusz Brzozowski (DSD, 2001)

Metastability tests of flip-flops in programmable digital circuits. - Józef Kalisz; Zbigniew Jachna (Microelectron. J., 2006)

A time digitizer based on multiphase clock implemented in FPGA device. - Pawel Kwiatkowski; Ryszard Szplet; Zbigniew Jachna; Krzysztof Rozyc (EBCCSP, 2016)

An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip. - Ryszard Szplet; Pawel Kwiatkowski; Zbigniew Jachna; Krzysztof Rozyc (IEEE Trans. Instrum. Meas., 2016)

Four-channel, precise, time-event recorder in programmable device. - Ryszard Szplet; Pawel Kwiatkowski; Zbigniew Jachna; Krzysztof Rozyc (EBCCSP, 2017)