Zeke Wang
Orcid: 0000-0001-8550-9241
According to our database1,
Zeke Wang
authored at least 53 papers
between 1984 and 2024.
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Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024
CoRR, 2024
2023
P4SGD: Programmable Switch Enhanced Model-Parallel Training on Generalized Linear Models on Distributed FPGAs.
IEEE Trans. Parallel Distributed Syst., August, 2023
cuZK: Accelerating Zero-Knowledge Proof with A Faster Parallel Multi-Scalar Multiplication Algorithm on GPUs.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023
Helios: An Efficient Out-of-core GNN Training System on Terabyte-scale Graphs with In-memory Performance.
CoRR, 2023
P4SGD: Programmable Switch Enhanced Model-Parallel Training on Generalized Linear Models on Distributed FPGAs.
CoRR, 2023
Legion: Automatically Pushing the Envelope of Multi-GPU System for Billion-Scale GNN Training.
Proceedings of the 2023 USENIX Annual Technical Conference, 2023
Achelous: Enabling Programmability, Elasticity, and Reliability in Hyperscale Cloud Networks.
Proceedings of the ACM SIGCOMM 2023 Conference, 2023
SmartDS: Middle-Tier-centric SmartNIC Enabling Application-aware Message Split for Disaggregated Block Storage.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
BM-Store: A Transparent and High-performance Local Storage Architecture for Bare-metal Clouds Enabling Large-scale Deployment.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
SSiMD: Supporting Six Signed Multiplications in a DSP Block for Low-Precision CNN on FPGAs.
Proceedings of the International Conference on Field Programmable Technology, 2023
MARS: Exploiting Multi-Level Parallelism for DNN Workloads on Adaptive Multi-Accelerator Systems.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
IEEE Trans. Parallel Distributed Syst., 2022
IEEE Trans. Computers, 2022
cuZK: Accelerating Zero-Knowledge Proof with A Faster Parallel Multi-Scalar Multiplication Algorithm on GPUs.
IACR Cryptol. ePrint Arch., 2022
Proceedings of the 2022 USENIX Annual Technical Conference, 2022
Terminator on SkyNet: a practical DVFS attack on DNN hardware IP for UAV object detection.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the Artificial Intelligence - Second CAAI International Conference, 2022
2021
Understanding and Optimizing Conjunctive Predicates Under Memory-Efficient Storage Layouts.
IEEE Trans. Knowl. Data Eng., 2021
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021
2020
Boyi: A Systematic Framework for Automatically Deciding the Right Execution Model of OpenCL Applications on FPGAs.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020
Proceedings of the EuroSys '20: Fifteenth EuroSys Conference 2020, 2020
Proceedings of the 10th Conference on Innovative Data Systems Research, 2020
2019
Accelerating Generalized Linear Models with MLWeaving: A One-Size-Fits-All System for Any-precision Learning.
Proc. VLDB Endow., 2019
doppioDB 2.0: Hardware Techniques for Improved Integration of Machine Learning into Databases.
Proc. VLDB Endow., 2019
Accelerating Generalized Linear Models with MLWeaving: A One-Size-Fits-All System for Any-precision Learning (Technical Report).
CoRR, 2019
Proceedings of the 9th Biennial Conference on Innovative Data Systems Research, 2019
2018
Proceedings of the 15th USENIX Symposium on Networked Systems Design and Implementation, 2018
Hebe: An Order-Oblivious and High-Performance Execution Scheme for Conjunctive Predicates.
Proceedings of the 34th IEEE International Conference on Data Engineering, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Design and FPGA Implementation of a Reconfigurable Digital Down Converter for Wideband Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2017
FPGA implementation of a reconfigurable channelization for simultaneous multichannel DRM30/FM receiver.
IEEE Trans. Consumer Electron., 2017
2016
Design and FPGA Implementation of a Reconfigurable 1024-Channel Channelization Architecture for SDR Application.
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Parallel Distributed Syst., 2016
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
2014
J. Zhejiang Univ. Sci. C, 2014
2013
Efficient Utilization of Vector Registers to Improve FFT Performance on SIMD Microprocessors.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013
Proceedings of the IEEE High Performance Extreme Computing Conference, 2013
2011
An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays.
J. Zhejiang Univ. Sci. C, 2011
1984