A fine-grained component-level power measurement method. - Zehan Cui; Yan Zhu 016; Yungang Bao; Mingyu Chen 001 (IGCC, 2011)

HaLock: hardware-assisted lock contention detection in multithreaded applications. - Yongbing Huang; Zehan Cui; Licheng Chen; Wenli Zhang; Yungang Bao; Mingyu Chen 001 (PACT, 2012)

A software memory partition approach for eliminating bank-level interference in multicore systems. - Lei Liu 030; Zehan Cui; Mingjie Xing; Yungang Bao; Mingyu Chen 001; Chengyong Wu (PACT, 2012)

Evaluation and Optimization of Breadth-First Search on NUMA Cluster. - Zehan Cui; Licheng Chen; Mingyu Chen 001; Yungang Bao; Yongbing Huang; Huiwei Lv (CLUSTER, 2012)

A lightweight hybrid hardware/software approach for object-relative memory profiling. - Licheng Chen; Zehan Cui; Yungang Bao; Mingyu Chen 001; Yongbing Huang; Guangming Tan (ISPASS, 2012)

Scattered superpage: A case for bridging the gap between superpage and page coloring. - Licheng Chen; Yanan Wang; Zehan Cui; Yongbing Huang; Yungang Bao; Mingyu Chen 001 (ICCD, 2013)

A Study of Leveraging Memory Level Parallelism for DRAM System on Multi-core/Many-Core Architecture. - Licheng Chen; Yongbing Huang; Yungang Bao; Guangming Tan; Zehan Cui (TrustCom/ISPA/IUCC, 2013)

MIMS: Towards a Message Interface based Memory System - Licheng Chen; Tianyue Lu; Yanan Wang; Mingyu Chen 001; Yuan Ruan; Zehan Cui; Yongbing Huang; Mingyang Chen; Jiutian Zhang; Yungang Bao (CoRR, 2013)

A Swap-based Cache Set Index Scheme to Leverage both Superpage and Page Coloring Optimizations. - Zehan Cui; Licheng Chen; Yungang Bao; Mingyu Chen 001 (DAC, 2014)

DTail: a flexible approach to DRAM refresh management. - Zehan Cui; Sally A. McKee; Zhongbin Zha; Yungang Bao; Mingyu Chen 001 (ICS, 2014)

Going vertical in memory management: Handling multiplicity by multi-policy. - Lei Liu 030; Yong Li; Zehan Cui; Yungang Bao; Mingyu Chen 001; Chengyong Wu (ISCA, 2014)

CMD: classification-based memory deduplication through page access characteristics. - Licheng Chen; Zhipeng Wei; Zehan Cui; Mingyu Chen 001; Haiyang Pan; Yungang Bao (VEE, 2014)

MIMS: Towards a Message Interface Based Memory System. - Licheng Chen; Mingyu Chen 001; Yuan Ruan; Yongbing Huang; Zehan Cui; Tianyue Lu; Yungang Bao (J. Comput. Sci. Technol., 2014)

HMTT: A hybrid hardware/software tracing system for bridging the DRAM access trace's semantic gap. - Yongbing Huang; Licheng Chen; Zehan Cui; Yuan Ruan; Yungang Bao; Mingyu Chen 001; Ninghui Sun (ACM Trans. Archit. Code Optim., 2014)

BPM/BPM+: Software-based dynamic memory partitioning mechanisms for mitigating DRAM bank-/channel-level interferences in multicore systems. - Lei Liu 030; Zehan Cui; Yong Li; Yungang Bao; Mingyu Chen 001; Chengyong Wu (ACM Trans. Archit. Code Optim., 2014)

Twin-Load: Building a Scalable Memory System over the Non-Scalable Interface. - Zehan Cui; Tianyue Lu; Haiyang Pan; Sally A. McKee; Mingyu Chen 001 (CoRR, 2015)

Cracking Intel Sandy Bridge's Cache Hash Function. - Zhipeng Wei; Zehan Cui; Mingyu Chen 001 (CoRR, 2015)

Twin-Load: Bridging the Gap between Conventional Direct-Attached and Buffer-on-Board Memory Systems. - Zehan Cui; Tianyue Lu; Sally A. McKee; Mingyu Chen 001; Haiyang Pan; Yuan Ruan (MEMSYS, 2016)

Neural network-based forecasting and uncertainty analysis of new power generation capacity of electric energy. - Xingyu Dou; Zehan Cui (Energy Inform., 2025)