A power gating switch box architecture in routing network of SRAM-based FPGAs in dark silicon era. - Zeinab Seifoori; Behnam Khaleghi; Hossein Asadi 001 (DATE, 2017)

Chapter Seven - Introduction to Emerging SRAM-Based FPGA Architectures in Dark Silicon Era. - Zeinab Seifoori; Zahra Ebrahimi; Behnam Khaleghi; Hossein Asadi 001 (Adv. Comput., 2018)

A Machine Learning Approach for Power Gating the FPGA Routing Network. - Zeinab Seifoori; Hossein Asadi 001; Mirjana Stojilovic (FPT, 2019)

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks. - Zeinab Seifoori; Seyedeh Sharareh Mirzargar; Mirjana Stojilovic (FPGA, 2020)

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing. - Zeinab Seifoori; Hossein Asadi 001; Mirjana Stojilovic (IEEE Access, 2021)

PERA: Power-Efficient Routing Architecture for SRAM-Based FPGAs in Dark Silicon Era. - Zeinab Seifoori; Behzad Omidi; Hossein Asadi 001 (IEEE Trans. Very Large Scale Integr. Syst., 2023)