FTW-GAT: An FPGA-Based Accelerator for Graph Attention Networks With Ternary Weights. - Zerong He; Teng Tian; Qizhe Wu; Xi Jin 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Tightly-Coupled FPGA Accelerator for Molecular Dynamics Simulation: Hardware-Software Co-Design and Fine-Grained Task Management. - Zekang Cheng; Zerong He; Xi Jin 002 (HPEC, 2024)

Task-Level Parallelism for the Multifrontal Method in Tightly Coupled CPU-FPGA Architectures. - Zerong He; Zekang Cheng; Zhongguang Xu; Xi Jin 002 (HPEC, 2024)

Exploring the Performance Improvement of Tensor Processing Engines through Transformation in the Bit-weight Dimension of MACs. - Qizhe Wu; Huawen Liang; Yuchen Gui; Zhichen Zeng 002; Zerong He; Linfeng Tao; Xiaotian Wang; Letian Zhao; Zhaoxi Zeng; Wei Yuan 006; Wei Wu; Xi Jin 002 (HPCA, 2025)

F3: An FPGA-Based Transformer Fine-Tuning Accelerator With Flexible Floating Point Format. - Zerong He; Xi Jin 002; Zhongguang Xu (IEEE J. Emerg. Sel. Topics Circuits Syst., 2025)