DFT Architecture for Click-Based Bundled-Data Asynchronous Circuits. - Ruimin Zhu; Zeyang Xu; Yuhao Huang; Shanlin Xiao; Zhiyi Yu (ICTA, 2022)

Physical random access signal design for 5G mobile satellite communication systems. - Min Hua; Zeyang Xu (Phys. Commun., 2022)

Towards Energy-Efficient Asynchronous Circuit Design with Flip-Flop-to-Latch Replacement. - Zeyang Xu; Shanlin Xiao; Lingfeng Zhou; Bohan Wang; Zhiyi Yu (ICTA, 2023)

An Efficient Asynchronous Circuits Design Flow with Backward Delay Propagation Constraint. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (DATE, 2024)

An FPGA-based QDI Asynchronous Circuits Design Methodology. - Guangyao Lin; Jinghai Wang; Zeyang Xu; Zhiyi Yu; Shanlin Xiao (ICTA, 2024)

Better-Than-Worst-Case: A Frequency Adaptation Asynchronous RISC-V Core With Vector Extension. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

LAC: A Novel Lightweight Asynchronous Controller With Optimized Phase Shift. - Huiyao Wang; Shanlin Xiao; Lingfeng Zhou; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Toward Efficient Asynchronous Circuits Design Flow Using Backward Delay Propagation Constraint. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

A Time-Borrowing Method for High-Performance Bundled-Data Asynchronous Circuits. - Bohan Wang; Zeyang Xu; Lingfeng Zhou; Huiyao Wang; Jinghai Wang; Zhiyi Yu; Shanlin Xiao (ISQED, 2025)