A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling. - Liang-Ying Lu; Ching-Yao Chang; Zhao-Hong Chen; Bo-Ting Yeh; Tai-Hua Lu; Peng-Yu Chen; Pin-Hao Tang; Kuen-Jong Lee; Lih-Yih Chiou; Soon-Jyh Chang; Chien-Hung Tsai; Chung-Ho Chen; et al. (ASP-DAC, 2016)

Improving the accuracy of pruned network using knowledge distillation. - Setya Widyawan Prakosa; Jenq-Shiou Leu; Zhao-Hong Chen (Pattern Anal. Appl., 2021)

Configurable Deep Learning Accelerator with Bitwise-accurate Training and Verification. - Shien-Chun Luo; Kuo-Chiang Chang; Po-Wei Chen; Zhao-Hong Chen (VLSI-DAT, 2022)