Teach Reconfigurable Computing using mixed-grained fabrics based hardware infrastructure. - Chenchen Deng; Leibo Liu; Zhaoshi Li; Shouyi Yin; Shaojun Wei (FIE, 2014)

Minimizing Pipeline Stalls in Distributed-Controlled Coarse-Grained Reconfigurable Arrays with Triggered Instruction Issue and Execution. - Yanan Lu; Leibo Liu; Yangdong Deng; Jian Weng 004; Zhaoshi Li; Chenchen Deng; Shaojun Wei (DAC, 2017)

A static-placement, dynamic-issue framework for CGRA loop accelerator. - Zhongyuan Zhao 004; Weiguang Sheng; Weifeng He; Zhigang Mao; Zhaoshi Li (DATE, 2017)

Aggressive Pipelining of Irregular Applications on Reconfigurable Hardware. - Zhaoshi Li; Leibo Liu; Yangdong Deng; Shouyi Yin; Yao Wang; Shaojun Wei (ISCA, 2017)

Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution. - Zhaoshi Li; Leibo Liu; Yangdong Deng; Shouyi Yin; Shaojun Wei (IEEE Comput. Archit. Lett., 2018)

HReA: An Energy-Efficient Embedded Dynamically Reconfigurable Fabric for 13-Dwarfs Processing. - Leibo Liu; Zhaoshi Li; Chen Yang 005; Chenchen Deng; Shouyi Yin; Shaojun Wei (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Constructing Concurrent Data Structures on FPGA with Channels. - Hui Yan; Zhaoshi Li; Leibo Liu; Shouyi Yin; Shaojun Wei (FPGA, 2019)

ReDESK: A Reconfigurable Dataflow Engine for Sparse Kernels on Heterogeneous Platforms. - Kai Lu; Zhaoshi Li; Leibo Liu; Jiawei Wang; Shouyi Yin; Shaojun Wei (ICCAD, 2019)

FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory. - Zhaoshi Li; Leibo Liu; Yangdong Deng; Jiawei Wang; Zhiwei Liu; Shouyi Yin; Shaojun Wei (MICRO, 2019)

GraphABCD: Scaling Out Graph Analytics with Asynchronous Block Coordinate Descent. - Yifan Yang; Zhaoshi Li; Yangdong Deng; Zhiwei Liu; Shouyi Yin; Shaojun Wei; Leibo Liu (ISCA, 2020)

CATCAM: Constant-time Alteration Ternary CAM with Scalable In-Memory Architecture. - Dibei Chen; Zhaoshi Li; Tianzhu Xiong; Zhiwei Liu; Jun Yang 006; Shouyi Yin; Shaojun Wei; Leibo Liu (MICRO, 2020)

A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications. - Leibo Liu; Jianfeng Zhu 001; Zhaoshi Li; Yanan Lu; Yangdong Deng; Jie Han 001; Shouyi Yin; Shaojun Wei (ACM Comput. Surv., 2020)

HeteroKV: A Scalable Line-rate Key-Value Store on Heterogeneous CPU-FPGA Platforms. - Haichang Yang; Zhaoshi Li; Jiawei Wang; Shouyi Yin; Shaojun Wei; Leibo Liu (DATE, 2021)

ABC-DIMM: Alleviating the Bottleneck of Communication in DIMM-based Near-Memory Processing with Inter-DIMM Broadcast. - Weiyi Sun; Zhaoshi Li; Shouyi Yin; Shaojun Wei; Leibo Liu (ISCA, 2021)

An Elastic Task Scheduling Scheme on Coarse-Grained Reconfigurable Architectures. - Longlong Chen; Jianfeng Zhu 001; Yangdong Deng; Zhaoshi Li; Jian Chen; Xiaowei Jiang; Shouyi Yin; Shaojun Wei; Leibo Liu (IEEE Trans. Parallel Distributed Syst., 2021)

Dynamically Reconfigurable Memory Address Mapping for General-Purpose Graphics Processing Unit. - Weiliang Chen; Zhaoshi Li; Leibo Liu; Shaojun Wei (ICTA, 2022)

Harp: Leveraging Quasi-Sequential Characteristics to Accelerate Sequence-to-Graph Mapping of Long Reads. - Yichi Zhang; Dibei Chen; Gang Zeng; Jianfeng Zhu 001; Zhaoshi Li; Longlong Chen; Shaojun Wei; Leibo Liu (ASPLOS (3), 2024)

CATCAM: a 28 nm constant-time alteration TCAM enabling less than 50 ns update latency. - Chenchen Deng; Tianzhu Xiong; Zhaoshi Li; Zhiwei Liu; Yao Wang; Jianfeng Zhu 001; Jun Yang 006; Shaojun Wei; Leibo Liu (Sci. China Inf. Sci., 2024)

Lincoln: Real-Time 50 100B LLM Inference on Consumer Devices with LPDDR-Interfaced, Compute-Enabled Flash Memory. - Weiyi Sun; Mingyu Gao 001; Zhaoshi Li; Aoyang Zhang; Iris Ying Chou; Jianfeng Zhu 001; Shaojun Wei; Leibo Liu (HPCA, 2025)

SSS-DIMM: Removing Redundant Data Movement in Trusted DIMM-Based Near-Memory-Processing Kernel Offloading via Secure Space Sharing. - Weiyi Sun; Jianfeng Zhu 001; Mingyu Gao 001; Zhaoshi Li; Shaojun Wei; Leibo Liu (IEEE Trans. Parallel Distributed Syst., 2025)