The Investigation and Optimisation of Phase-Induced Amplitude Attenuation in the Injection-Locked Ring Oscillators-Based Receiver. - Xiaopeng Yu 002; Zhe Liu 038; De Zhang Fan; Kiat Seng Yeo (Circuits Syst. Signal Process., 2017)

A Bridged Contactless Measurement Technique for LC Tank Based Voltage-Controlled Oscillator. - Zhe Liu 038; Xiaopeng Yu 002; Teng-long Fan; Cheng Cao; Wen-quan Sui (J. Electron. Test., 2017)

A DLL-based Configurable Multi-Phase Clock Generator for True-Time-Delay Wideband FMCW Phased-Array in 40nm CMOS. - Zhe Liu 038; Liheng Lou; Zhongyuan Fang; Kai Tang 002; Ting Guo; Yuanjin Zheng (ISCAS, 2018)

A DDS-Driven ADPLL Chirp Synthesizer with Ramp-Interpolating Linearization for FMCW Radar Application in 65nm CMOS. - Liheng Lou; Kai Tang 002; Zhongyuan Fang; Bo Chen 014; Ting Guo; Zhe Liu 038; Yuanjin Zheng (ISCAS, 2018)

A 253mW/channel 4TX/4RX pulsed chirping phased-array radar TRX in 65nm CMOS for X-band synthetic-aperture radar imaging. - Liheng Lou; Kai Tang 002; Bo Chen 014; Ting Guo; Yisheng Wang; Wensong Wang; Zhongyuan Fang; Zhe Liu 038; Yuanjin Zheng (ISSCC, 2018)

Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line. - Qian Chen 027; Chirn Chye Boon; Xueyong Zhang; Chenyang Li 008; Yuan Liang 004; Zhe Liu 038; Ting Guo (ISCAS, 2020)

Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology. - Lingshan Kong; Hang Liu 006; Xi Zhu 001; Chirn Chye Boon; Chenyang Li 008; Zhe Liu 038; Kiat Seng Yeo (IEEE Trans. Circuits Syst., 2020)

A 1.75dB-NF 25mW 5GHz Transformer-Based Noise- Cancelling CMOS Receiver Front-End. - Kaituo Yang; Chirn Chye Boon; Guangyin Feng; Chenyang Li 008; Zhe Liu 038; Ting Guo; Xiang Yi; Yangtao Dong; Ao Zhou 003; Xiaoying Wang (ISSCC, 2021)

A Bidirectional Nonlinearly Coupled QVCO With Passive Phase Interpolation for Multiphase Signals Generation. - Yangtao Dong; Chirn Chye Boon; Xin Ding 003; Chenyang Li 008; Zhe Liu 038 (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A 2-GHz Dual-Path Sub-Sampling PLL with Ring VCO Phase Noise Suppression. - Yangtao Dong; Chirn Chye Boon; Kaituo Yang; Zhe Liu 038 (CICC, 2022)

A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting Gm Boosting. - Zhe Liu 038; Chirn Chye Boon; Chenyang Li 008; Kaituo Yang; Yangtao Dong; Ting Guo (ISSCC, 2022)

A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver with +10dBm in-Band IIP3 in Current-Mode and 1.7dB NF in Voltage-Mode. - Kaituo Yang; Chirn Chye Boon; Zhe Liu 038; Jiaming Piao; Ting Guo; Yangtao Dong; Chenyang Li 008; Ao Zhou 003; Zhijie Yang; Xiaoying Wang; Yufeng Liu (ISSCC, 2022)

A 0.092-mm2 2-12-GHz Noise-Cancelling Low-Noise Amplifier With Gain Improvement and Noise Reduction. - Zhe Liu 038; Chirn Chye Boon (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 2.4dB NF +4.1dBm IIP3 Differential Dual-Feedforward-Based Noise-Cancelling LNTA With Complementary NMOS and PMOS Configuration. - Zhe Liu 038; Chirn Chye Boon; Yangtao Dong; Kaituo Yang (ESSCIRC, 2023)

A 0.6 V, 1.74 mW, 2.9 dB NF Inductorless Wideband LNA in 28-nm CMOS Exploiting Noise Cancellation and Current Reuse. - Zhe Liu 038; Chirn Chye Boon; Yangtao Dong (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)