Program Interferometry. - Zhe Wang 023; Daniel A. Jiménez (PACT, 2011)

Exploiting Rank Idle Time for Scheduling Last-Level Cache Writeback. - Zhe Wang 023; Daniel A. Jiménez (PACT, 2011)

Decoupled dynamic cache segmentation. - Samira Manabi Khan; Zhe Wang 023; Daniel A. Jiménez (HPCA, 2012)

Improving writeback efficiency with decoupled last-write prediction. - Zhe Wang 023; Samira Manabi Khan; Daniel A. Jiménez (ISCA, 2012)

Rank idle time prediction driven last-level cache writeback. - Zhe Wang 023; Samira Manabi Khan; Daniel A. Jiménez (MSPC, 2012)

WADE: Writeback-aware dynamic cache management for NVM-based main memory system. - Zhe Wang 023; Shuchang Shan; Ting Cao; Junli Gu; Yi Xu; Shuai Mu; Yuan Xie 001; Daniel A. Jiménez (ACM Trans. Archit. Code Optim., 2013)

Adaptive placement and migration policy for an STT-RAM-based hybrid cache. - Zhe Wang 023; Daniel A. Jiménez; Cong Xu; Guangyu Sun 003; Yuan Xie 001 (HPCA, 2014)

Minimal disturbance placement and promotion. - Elvira Teran; Yingying Tian; Zhe Wang 023; Daniel A. Jiménez (HPCA, 2016)

Perceptron learning for reuse prediction. - Elvira Teran; Zhe Wang 023; Daniel A. Jiménez (MICRO, 2016)

Building a Low Latency, Highly Associative DRAM Cache with the Buffered Way Predictor. - Zhe Wang 023; Daniel A. Jiménez; Tao Zhang 032; Gabriel H. Loh; Yuan Xie 001 (SBAC-PAD, 2016)

Detecting and mitigating data-dependent DRAM failures by exploiting current memory content. - Samira Manabi Khan; Chris Wilkerson; Zhe Wang 023; Alaa R. Alameldeen; Donghyuk Lee; Onur Mutlu (MICRO, 2017)

Flexible associativity for DRAM caches. - Elvira Teran; Zeshan Chishti; Zhe Wang 023; Chris Wilkerson; Daniel A. Jiménez (CF, 2018)

Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tiles. - Renzo Andri; Beatrice Bussolino; Antonio Cipolletta; Lukas Cavigelli; Zhe Wang 023 (MICRO, 2022)

AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications. - Jawad Haj-Yahya; Haris Volos 001; Davide B. Bartolini; Georgia Antoniou; Jeremie S. Kim; Zhe Wang 023; Kleovoulos Kalaitzidis; Tom Rollet; Zhirui Chen; Ye Geng; Onur Mutlu; Yiannakis Sazeides (MICRO, 2022)

Identifying and Exploiting Sparse Branch Correlations for Optimizing Branch Prediction. - Anastasios Zouzias; Kleovoulos Kalaitzidis; Konstantin Berestizshevsky; Renzo Andri; Leeor Peled; Zhe Wang 023 (CoRR, 2022)

Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tile. - Renzo Andri; Beatrice Bussolino; Antonio Cipolletta; Lukas Cavigelli; Zhe Wang 023 (CoRR, 2022)

Agile C-states: A Core C-state Architecture for Latency Critical Applications Optimizing both Transition and Cold-Start Latency. - Georgia Antoniou; Davide B. Bartolini; Haris Volos 001; Marios Kleanthous; Zhe Wang 023; Kleovoulos Kalaitzidis; Tom Rollet; Ziwei Li; Onur Mutlu; Yiannakis Sazeides; Jawad Haj-Yahya (ACM Trans. Archit. Code Optim., 2024)

Push Multicast: A Speculative and Coherent Interconnect for Mitigating Manycore CPU Communication Bottleneck. - Jiayi Huang 001; Yanhua Chen; Zhe Wang 023; Christopher J. Hughes; Yufei Ding 001; Yuan Xie 001 (HPCA, 2025)