Analysis and Design of Precision-Scalable Computation Array for Efficient Neural Radiance Field Rendering. - Kangjie Long; Chaolin Rao; Yunxiang He; Zhechen Yuan; Pingqiang Zhou; Jingyi Yu; Xin Lou (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

An FPGA Accelerator for 3D Cone-beam Sparse-view Computed Tomography Reconstruction. - Yuhan Gu; Qing Wu 001; Zhechen Yuan; Xiangyu Zhang; Wenyan Su; Yuyao Zhang; Xin Lou (AICAS, 2024)

A 0.59μJ/pixel High-throughput Energy-efficient Neural Volume Rendering Accelerator on FPGA. - Zhechen Yuan; Binzhe Yuan; Yuhan Gu; Yueyang Zheng; Yunxiang He; Xuexin Wang; Chaolin Rao; Pingqiang Zhou; Jingyi Yu; Xin Lou (CICC, 2024)

Ray Reordering for Hardware-Accelerated Neural Volume Rendering. - Junran Ding; Yunxiang He; Binzhe Yuan; Zhechen Yuan; Pingqiang Zhou; Jingyi Yu; Xin Lou (IEEE Trans. Circuits Syst. Video Technol., 2024)