An 11b 80MS/s SAR ADC With Speed-Enhanced SAR Logic and High-Linearity CDAC. - Yuefeng Cao; Yongzhen Chen; Zhekan Ni; Fan Ye 001; Junyan Ren (APCCAS, 2018)

A 800 MS/s, 12-Bit, Ringamp-Based SAR assisted Pipeline ADC with Gain Error Cancellation. - Yongzhen Chen; Zhekan Ni; Yuefeng Cao; Fan Ye 001; Junyan Ren (ISCAS, 2018)

A 625MS/s, 12-Bit, SAR Assisted Pipeline ADC with Effective Gain Analysis for Inter-stage Ringamps. - Yongzhen Chen; Xingchen Shen; Zhekan Ni; Jingchao Lan; Chixiao Chen; Fan Ye 001; Junyan Ren (ESSCIRC, 2019)

A 13-bit 180-MS/s SAR ADC with Efficient Capacitor-Mismatch Estimation and Dither Enhancement. - Fan Ye 001; Shuai Li 014; Min Zhu; Zhekan Ni; Junyan Ren (ISCAS, 2019)

A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic. - Zhekan Ni; Yongzhen Chen; Fan Ye 001; Junyan Ren (Microelectron. J., 2019)

A 2.5-GS/s Time-Interleaved SAR-Assisted Ringamp-Based Pipelined ADC with Digital Background Calibration. - Jingchao Lan; Danfeng Zhai; Yongzhen Chen; Zhekan Ni; Xingchen Shen; Fan Ye 001; Junyan Ren (ISCAS, 2022)

Effective Gain Analysis and Statistic Based Calibration for Ring Amplifier With Robustness to PVT Variation. - Jingchao Lan; Yongzhen Chen; Xingchen Shen; Zhekan Ni; Yimin Wu; Fan Ye 001; Junyan Ren (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Switchable Linear Regulator Implemented in GaAs pHEMT for WiFi Application. - Tingwei Gong; Zhiqun Cheng; Chao Le; Zhekan Ni; Xuefei Xuan; Bangjie Zheng; Junqiang Wang (Int. J. Circuit Theory Appl., 2025)