Zhen Wang

Orcid: 0000-0002-7821-2252

Affiliations:
  • Nanjing Prochip Electronic Technology Company Ltd., China
  • Southeast University, Nanjing, China (PhD 2018)


According to our database1, Zhen Wang authored at least 20 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

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Bibliography

2023
Multiplication Circuit Architecture for Error- Tolerant CNN-Based Keywords Speech Recognition.
IEEE Des. Test, June, 2023

A Reconfigurable Approximate Computing Architecture With Dual-VDD for Low-Power Binarized Weight Network Deployment.
IEEE Trans. Circuits Syst. II Express Briefs, 2023

2022
More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Quality Driven Systematic Approximation for Binary-Weight Neural Network Deployment.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An Efficient BCNN Deployment Method Using Quality-Aware Approximate Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Self-compensation tensor multiplication unit for adaptive approximate computing in low-power CNN processing.
Sci. China Inf. Sci., 2022

A Target-Separable BWN Inspired Speech Recognition Processor with Low-power Precision-adaptive Approximate Computing.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
A survey of in-spin transfer torque MRAM computing.
Sci. China Inf. Sci., 2021

2020
A 22nm, 10.8 μ W/15.1 μ W Dual Computing Modes High Power-Performance-Area Efficiency Domained Background Noise Aware Keyword- Spotting Processor.
IEEE Trans. Circuits Syst., 2020

QCNN Inspired Reconfigurable Keyword Spotting Processor With Hybrid Data-Weight Reuse Methods.
IEEE Access, 2020

Binarized Weight Neural-Network Inspired Ultra-Low Power Speech Recognition Processor with Time-Domain Based Digital-Analog Mixed Approximate Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Background Noise Self-adaptive VAD Using SNR Prediction Based Precision Dynamic Reconfigurable Approximate Computing.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

An Ultra-low Power Keyword-Spotting Accelerator Using Circuit-Architecture-System Co-design and Self-adaptive Approximate Computing Based BWN.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019
An energy-efficient voice activity detector using deep neural networks and approximate computing.
Microelectron. J., 2019

An Ultra-Low Power Always-On Keyword Spotting Accelerator Using Quantized Convolutional Neural Network and Voltage-Domain Analog Switching Network-Based Approximate Computing.
IEEE Access, 2019

EERA-KWS: A 163 TOPS/W Always-on Keyword Spotting Accelerator in 28nm CMOS Using Binary Weight Network and Precision Self-Adaptive Approximate Computing.
IEEE Access, 2019

Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
A Double Dwell High Sensitivity GPS Acquisition Scheme Using Binarized Convolution Neural Network.
Sensors, 2018

EERA-DNN: An energy-efficient reconfigurable architecture for DNNs with hybrid bit-width and logarithmic multiplier.
IEICE Electron. Express, 2018

2017
Implementation and Verification of a High-Throughput Reconfigurable MIMO Detector.
Proceedings of the 2017 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2017


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