A novel particle swarm optimizer with multi-stage transformation and genetic operation for VLSI routing. - Genggeng Liu; Zhen Zhuang; Wenzhong Guo; Naixue Xiong; Guolong Chen (CoRR, 2018)

RDTA: An Efficient Routability-Driven Track Assignment Algorithm. - Genggeng Liu; Zhen Zhuang; Wenzhong Guo; Ting-Chi Wang (ACM Great Lakes Symposium on VLSI, 2019)

X-Architecture Steiner Minimal Tree Construction Based on Discrete Differential Evolution. - Hailin Wu; Saijuan Xu; Zhen Zhuang; Genggeng Liu (ICNC-FSKD, 2019)

MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes. - Xinghai Zhang; Zhen Zhuang; Genggeng Liu; Xing Huang 001; Wen-Hao Liu 001; Wenzhong Guo; Ting-Chi Wang (DATE, 2020)

MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique. - Zhen Zhuang; Genggeng Liu; Xing Huang 001; Xiaotao Jia; Wen-Hao Liu 001; Wenzhong Guo (ACM Great Lakes Symposium on VLSI, 2020)

A unified algorithm based on HTS and self-adapting PSO for the construction of octagonal and rectilinear SMT. - Genggeng Liu; Zhisheng Chen 002; Zhen Zhuang; Wenzhong Guo; Guolong Chen (Soft Comput., 2020)

ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification. - Zhen Zhuang; Xing Huang 001; Genggeng Liu; Wenzhong Guo; Weikang Qian; Wen-Hao Liu 001 (DATE, 2021)

TRADER: A Practical Track-Assignment-Based Detailed Router. - Zhen Zhuang; Genggeng Liu; Tsung-Yi Ho; Bei Yu 001; Wenzhong Guo (DATE, 2022)

Multi-Package Co-Design for Chiplet Integration. - Zhen Zhuang; Bei Yu 001; Kai-Yuan Chao; Tsung-Yi Ho (ICCAD, 2022)

SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition. - Yidan Jing; Liliang Yang; Zhen Zhuang; Genggeng Liu; Xing Huang 001; Wen-Hao Liu 001; Ting-Chi Wang (VLSI-SoC, 2022)

Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding. - Zhen Zhuang; Kai-Yuan Chao; Bei Yu 001; Tsung-Yi Ho; Martin D. F. Wong (ICCAD, 2023)

Floorplet: Performance-Aware Floorplan Framework for Chiplet Integration. - Shixin Chen; Shanyi Li; Zhen Zhuang; Su Zheng; Zheng Liang 003; Tsung-Yi Ho; Bei Yu 001; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization. - Genggeng Liu; Yuhan Zhu; Zhen Zhuang; Zhenyu Pei; Min Gan; Xing Huang 001; Wenzhong Guo (IEEE Trans. Syst. Man Cybern. Syst., 2024)

Fast Routing Algorithm for Mask Stitching Region of Ultra Large Wafer Scale Integration. - Zhen Zhuang; Quan Chen 007; Hao Yu 001; Tsung-Yi Ho (ASP-DAC, 2025)

ML-Based Fine-Grained Modeling of DC Current Crowding in Power Delivery TSVs for Face-to-Face 3D ICs. - Zheng Yang; Zhen Zhuang; Bei Yu 001; Tsung-Yi Ho; Martin D. F. Wong; Sung Kyu Lim (ISPD, 2025)

Neural Algorithmic Reasoning for Hypergraphs with Looped Transformers. - Xiaoyu Li 001; Yingyu Liang; Jiangxuan Long 001; Zhenmei Shi; Zhao Song 002; Zhen Zhuang (CoRR, 2025)

Text-to-Image Diffusion Models Cannot Count, and Prompt Refinement Cannot Help. - Yuefan Cao; Xuyang Guo; Jiayan Huo; Yingyu Liang; Zhenmei Shi; Zhao Song 002; Jiahao Zhang; Zhen Zhuang (CoRR, 2025)