Zheng Zhang
Orcid: 0000-0002-2292-0030Affiliations:
- University of California, Santa Barbara, USA
- Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, Cambridge, MA, USA (former)
- University of Hong Kong, Department of Electrical and Electronic Engineering, Pokfulam, Hong Kong (former)
According to our database1,
Zheng Zhang
authored at least 65 papers
between 2009 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
PoBO: A Polynomial Bounding Method for Chance-Constrained Yield-Aware Optimization of Photonic ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Efficient Processing of Sparse Tensor Decomposition via Unified Abstraction and PE-Interactive Architecture.
IEEE Trans. Computers, 2022
Towards Compact Neural Networks via End-to-End Training: A Bayesian Tensor Approach with Automatic Rank Determination.
SIAM J. Math. Data Sci., 2022
Proceedings of the Mathematical and Scientific Machine Learning, 2022
Proceedings of the IEEE International Geoscience and Remote Sensing Symposium, 2022
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE J. Sel. Top. Signal Process., 2021
Neurocomputing, 2021
General-Purpose Bayesian Tensor Learning With Automatic Rank Determination and Uncertainty Quantification.
Frontiers Artif. Intell., 2021
3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low BitwidthQuantization, and Ultra-Low Latency Acceleration.
CoRR, 2021
CoRR, 2021
High-Dimensional Uncertainty Quantification via Rank- and Sample-Adaptive Tensor Regression.
CoRR, 2021
3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low Bitwidth Quantization, and Ultra-Low Latency Acceleration.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
2020
Prediction of Multidimensional Spatial Variation Data via Bayesian Tensor Completion.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Chance-Constrained and Yield-Aware Optimization of Photonic ICs With Non-Gaussian Correlated Process Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
High-Dimensional Uncertainty Quantification of Electronic and Photonic IC With Non-Gaussian Correlated Process Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
SIAM J. Math. Data Sci., 2020
End-to-End Variational Bayesian Training of Tensorized Neural Networks with Automatic Rank Determination.
CoRR, 2020
High-Dimensional Uncertainty Quantification via Active and Rank-Adaptive Tensor Regression.
CoRR, 2020
2019
Stochastic Model Predictive Control of Autonomous Systems with Non-Gaussian Correlated Uncertainty.
CoRR, 2019
Prediction of multi-dimensional spatial variation data via Bayesian tensor completion.
CoRR, 2019
Uncertainty-Aware Computational Tools for Power Distribution Networks Including Electrical Vehicle Charging and Load Profiles.
IEEE Access, 2019
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Tensor Methods for Generating Compact Uncertainty Quantification and Deep Learning Models.
Proceedings of the International Conference on Computer-Aided Design, 2019
2018
Variation-Aware Modeling of Integrated Capacitors Based on Floating Random Walk Extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Stochastic Collocation with Non-Gaussian Correlated Parameters via a New Quadrature Rule.
CoRR, 2018
Proceedings of the IEEE International Conference on Industrial Technology, 2018
Variational Bayesian Inference for Robust Streaming Tensor Factorization and Completion.
Proceedings of the IEEE International Conference on Data Mining, 2018
Uncertainty quantification of electronic and photonic ICs with non-Gaussian correlated process variations.
Proceedings of the International Conference on Computer-Aided Design, 2018
2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
2016
Analysis and Design of Boolean Associative Memories Made of Resonant Oscillator Arrays.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
A Big-Data Approach to Handle Many Process Variations: Tensor Recovery and Applications.
CoRR, 2016
A Big-Data Approach to Handle Process Variations: Uncertainty Quantification by Tensor Recovery.
CoRR, 2016
2015
Uncertainty quantification for integrated circuits and microelectrornechanical systems.
PhD thesis, 2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Enabling High-Dimensional Hierarchical Uncertainty Quantification by ANOVA and Tensor-Train Decomposition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Analysis and Design of Weakly Coupled LC Oscillator Arrays Based on Phase-Domain Macromodels.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
CoRR, 2015
2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Calculation of Generalized Polynomial-Chaos Basis Functions and Gauss Quadrature Rules in Hierarchical Uncertainty Quantification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Int. J. Circuit Theory Appl., 2014
Stochastic testing simulator for integrated circuits and MEMS: Hierarchical and sparse techniques.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
Efficient Uncertainty Quantification for the Periodic Steady State of Forced and Autonomous Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
2011
Model order reduction of fully parameterized systems by recursive least square optimization.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
A moment-matching scheme for the passivity-preserving model order reduction of indefinite descriptor systems with possible polynomial parts.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
Passivity Test of Immittance Descriptor Systems Based on Generalized Hamiltonian Methods.
IEEE Trans. Circuits Syst. II Express Briefs, 2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
PEDS: Passivity enforcement for descriptor systems via Hamiltonian-symplectic matrix pencil perturbation.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
An extension of the generalized Hamiltonian method to <i>S</i>-parameter descriptor systems.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
GHM: A generalized Hamiltonian method for passivity test of impedance/admittance descriptor systems.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009