A 2.9 mm2 Highly Integrated Low Noise GPS Receiver in 0.18-μm CMOS Technology. - Zhengfei Hu; Li Zhang; Mindi Huang (J. Circuits Syst. Comput., 2015)

A 2-20 Gbps Clock and Data Recovery Based on Phase Interpolation and Delay Locked Loop. - Yinghao Chen; Yingmei Chen; Wentian Fan; Qingyi Zhao; En Zhu; Zhengfei Hu (Circuits Syst. Signal Process., 2024)