An Analytical Model for the Performance of the DOCSIS CATV Network. - Zhenglin Liu; Chongyang Xu (Comput. J., 2002)

Adaptive Interpolation Algorithm for Real-time Image Resizing. - Jianping Xiao; Xuecheng Zou; Zhenglin Liu; Xu Guo (ICICIC (2), 2006)

Dynamically Reconfigurable Cache for Low-Power Embedded System. - Liming Chen; Xuecheng Zou; Jianming Lei; Zhenglin Liu (ICNC (5), 2007)

On the Ability of AES S-Boxes to Secure Against Correlation Power Analysis. - Zhenglin Liu; Xu Guo; Yi-Cheng Chen; Yu Han; Xuecheng Zou (ISPEC, 2007)

Efficient DPA Attacks on AES Hardware Implementations. - Yu Han; Xuecheng Zou; Zhenglin Liu; Yi-Cheng Chen (Int. J. Commun. Netw. Syst. Sci., 2008)

Timestamp Based Predictive Robot Control System over Real-Time Industrial Ethernet. - Huasong Min; Tianmiao Wang; Hongxing Wei; Zhenglin Liu (ICIRA (1), 2010)

Design of high-rate long-length structured QC-LDPC with good error performance. - Xiong Yin; Zhaoxia Zheng; Yi Dan; Zhenglin Liu (ICSPCS, 2011)

Hardware implementation of SHA-3 candidate based on BLAKE-32. - Zhenglin Liu; Xin Dong; Yizhi Zhao; Dongfang Li (BMEI, 2012)

HeapDefender: A Mechanism of Defending Embedded Systems against Heap Overflow via Hardware. - Dongfang Li; Zhenglin Liu; Yizhi Zhao (UIC/ATC, 2012)

Memory monitor module for embedded systems. - Zhenglin Liu; Qidi Zhao; Dongfang Li; Xuecheng Zou (Comput. Electr. Eng., 2012)

Off-Chip Memory Encryption and Integrity Protection Based on AES-GCM in Embedded Systems. - Zhenglin Liu; Qingchun Zhu; Dongfang Li; Xuecheng Zou (IEEE Des. Test, 2013)

A +33dBm 1.9 GHz linear CMOS power amplifier with MOS-level linearizers. - Zhi-xiong Ren; Ke-feng Zhang; Lan-qi Liu; Cong Li; Xiaofei Chen; Dongsheng Liu; Zhenglin Liu; Xuecheng Zou (ISIC, 2014)

A Trustworthy Key Generation Prototype Based on DDR3 PUF for Wireless Sensor Networks. - Wenchao Liu 003; Zhenhua Zhang; Miao-Xin Li; Zhenglin Liu (Sensors, 2014)

Sensorless Predictive Peak Current Control for Boost Converter Using Comprehensive Compensation Strategy. - Qiaoling Tong; Qiao Zhang; Run Min; Xuecheng Zou; Zhenglin Liu; Zhiqian Chen (IEEE Trans. Ind. Electron., 2014)

Sensorless Predictive Current Controlled DC-DC Converter With a Self-Correction Differential Current Observer. - Qiao Zhang; Run Min; Qiaoling Tong; Xuecheng Zou; Zhenglin Liu; Anwen Shen (IEEE Trans. Ind. Electron., 2014)

Hardware IP Protection through Gate-Level Obfuscation. - Dongfang Li; Wenchao Liu 003; Xuecheng Zou; Zhenglin Liu (CAD/Graphics, 2015)

Efficient Off-Chip Memory Protection Mechanism for Embedded Computing Systems Using AES-GCM. - Zhaojun Lu; Xiaoliang Xing; Qiaoling Tong; Zhenglin Liu (CAD/Graphics, 2015)

A 2.45-GHz W-level output power CMOS power amplifier with adaptive bias and integrated diode linearizer. - Zhi-xiong Ren; Ke-feng Zhang; Lan-qi Liu; Xiaofei Chen; Dongsheng Liu; Zhenglin Liu; Xuecheng Zou (Microelectron. J., 2015)

PUFKEY: A High-Security and High-Throughput Hardware True Random Number Generator for Sensor Networks. - Dongfang Li; Zhaojun Lu; Xuecheng Zou; Zhenglin Liu (Sensors, 2015)

Chaos embedded polar coding for wiretap channel in negative secrecy capacity case. - Yizhi Zhao; Xuecheng Zou; Zhenglin Liu (CISP-BMEI, 2016)

Digital Sensorless Current Mode Control Based on Charge Balance Principle and Dual Current Error Compensation for DC-DC Converters in DCM. - Run Min; Qiaoling Tong; Qiao Zhang; Xuecheng Zou; Kai Yu 008; Zhenglin Liu (IEEE Trans. Ind. Electron., 2016)

An Anti-Electromagnetic Attack PUF Based on a Configurable Ring Oscillator for Wireless Sensor Networks. - Zhaojun Lu; Dongfang Li; Hailong Liu; Mingyang Gong; Zhenglin Liu (Sensors, 2017)

Chaotic Encrypted Polar Coding Scheme for General Wiretap Channel. - Yizhi Zhao; Xuecheng Zou; Zhaojun Lu; Zhenglin Liu (IEEE Trans. Very Large Scale Integr. Syst., 2017)

BARS: A Blockchain-Based Anonymous Reputation System for Trust Management in VANETs. - Zhaojun Lu; Qian Wang 022; Gang Qu 001; Zhenglin Liu (TrustCom/BigDataSE, 2018)

A Novel Security Key Generation Method for SRAM PUF Based on Fourier Analysis. - Wenchao Liu 003; Zhaojun Lu; Hailong Liu; Run Min; Zhangfan Zeng; Zhenglin Liu (IEEE Access, 2018)

A Privacy-Preserving Trust Model Based on Blockchain for VANETs. - Zhaojun Lu; Wenchao Liu 003; Qian Wang 022; Gang Qu 001; Zhenglin Liu (IEEE Access, 2018)

Pitfall of the Strongest Cells in Static Random Access Memory Physical Unclonable Functions. - Mingyang Gong; Hailong Liu; Run Min; Zhenglin Liu (Sensors, 2018)

Methods for Estimating the Convergence of Inter-Chip Min-Entropy of SRAM PUFs. - Hailong Liu; Wenchao Liu 003; Zhaojun Lu; Qiaoling Tong; Zhenglin Liu (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

LEAP: A Lightweight Encryption and Authentication Protocol for In-Vehicle Communications. - Zhaojun Lu; Qian Wang 022; Xi Chen; Gang Qu 001; Yongqiang Lyu 001; Zhenglin Liu (ITSC, 2019)

A NAND Flash Endurance Prediction Scheme with FPGA-based Memory Controller System. - Zhuo Chen; Yuqian Pan; Mingyang Gong; Haichun Zhang; Mingyu Zhang; Zhenglin Liu (SoCC, 2019)

Pass and Run: A Privacy Preserving Delay Tolerant Network Communication Protocol for CyberVehicles. - Zhaojun Lu; Mingze Gao; Zhenglin Liu; Gang Qu 001; Carson Dunbar (IEEE Des. Test, 2019)

Superposed Compensation Strategy to Optimize Load/Line Transient Response and Reference Tracking for Discontinuous Conduction Mode Boost Converter. - Run Min; Xiaofeng Zhang; Dian Lyu; Linkai Li; Qiaoling Tong; Xuecheng Zou; Zhenglin Liu (IEEE Trans. Ind. Informatics, 2019)

A Survey on Recent Advances in Vehicular Network Security, Trust, and Privacy. - Zhaojun Lu; Gang Qu 001; Zhenglin Liu (IEEE Trans. Intell. Transp. Syst., 2019)

A Blockchain-Based Privacy-Preserving Authentication Scheme for VANETs. - Zhaojun Lu; Qian Wang 022; Gang Qu 001; Haichun Zhang; Zhenglin Liu (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Unexpected Error Explosion in NAND Flash Memory: Observations and Prediction Scheme. - Yuqian Pan; Haichun Zhang; Mingyang Gong; Zhenglin Liu (ATS, 2020)

Process-variation Effects on 3D TLC Flash Reliability: Characterization and Mitigation Scheme. - Yuqian Pan; Haichun Zhang; Mingyang Gong; Zhenglin Liu (QRS, 2020)

Design and implementation of robust and low-cost SRAM PUF using PMOS and linear shift register extractor. - Mingyang Gong; Haichun Zhang; Chao Wang 096; Qiaoling Tong; Zhenglin Liu (Microelectron. J., 2020)

An Improved Design and Implementation of a Range-Controlled Communication System for Mobile Phones. - Mingyang Gong; Haichun Zhang; Zhenglin Liu (Sensors, 2020)

CANsec: A Practical in-Vehicle Controller Area Network Security Evaluation Tool. - Haichun Zhang; Xu Meng; Xiong Zhang; Zhenglin Liu (Sensors, 2020)

A Cyber Security Evaluation Framework for In-Vehicle Electrical Control Units. - Haichun Zhang; Yuqian Pan; Zhaojun Lu; Jie Wang 001; Zhenglin Liu (IEEE Access, 2021)

Corrigendum to "Design and implementation of robust and low-cost SRAM PUF using PMOS and linear shift register extractor" [Microelectron. J. 103C (2020) 104844]. - Mingyang Gong; Haichun Zhang; Chao Wang; Qiaoling Tong; Zhenglin Liu (Microelectron. J., 2021)

Fooling the Eyes of Autonomous Vehicles: Robust Physical Adversarial Examples Against Traffic Sign Recognition Systems. - Wei Jia; Zhaojun Lu; Haichun Zhang; Zhenglin Liu; Jie Wang 001; Gang Qu 001 (NDSS, 2022)

Design and Analysis of Area and Energy Efficient Reconfigurable Cryptographic Accelerator for Securing IoT Devices. - Xvpeng Zhang; Bingqiang Liu; Yaqi Zhao; Xiaoyu Hu; Zixuan Shen; Zhaoxia Zheng; Zhenglin Liu; Kwen-Siong Chong; Guoyi Yu; Chao Wang 096; Xuecheng Zou (Sensors, 2022)

An FPGA-Compatible TRNG with Ultra-High Throughput and Energy Efficiency. - Zhaojun Lu; Houjia Qidiao; Qidong Chen; Zhenglin Liu; Jiliang Zhang 002 (DAC, 2023)

LightWarner: Predicting Failure of 3D NAND Flash Memory Using Reinforcement Learning. - Yuqian Pan; Haichun Zhang; Runze Yu; Zhaojun Lu; Haoming Zhang; Zhenglin Liu (IEEE Trans. Computers, 2023)

ADLPT: Improving 3D NAND Flash Memory Reliability by Adaptive Lifetime Prediction Techniques. - Yuqian Pan; Zhaojun Lu; Haichun Zhang; Haoming Zhang; Md Tanvir Arafin; Zhenglin Liu; Gang Qu 001 (IEEE Trans. Computers, 2023)

Negative Design Margin Realization through Deep Path Activity Detection Combined with Dynamic Voltage Scaling in a 55 nm Near-Threshold 32-Bit Microcontroller. - Run-Ze Yu; Zhenhao Li; Xi Deng; Zhenglin Liu (Sensors, 2023)

An RRAM-Based Computing-in-Memory Architecture and Its Application in Accelerating Transformer Inference. - Zhaojun Lu; Xueyan Wang; Md Tanvir Arafin; Haoxiang Yang; Zhenglin Liu; Jiliang Zhang 002; Gang Qu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Efficient Approximate Floating-Point Multiplier With Runtime Reconfigurable Frequency and Precision. - Zhenhao Li; Zhaojun Lu; Wei Jia; Runze Yu; Haichun Zhang; Gefei Zhou; Zhenglin Liu; Gang Qu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Fooling Decision-Based Black-Box Automotive Vision Perception Systems in Physical World. - Wei Jia; Zhaojun Lu; Runze Yu; Liaoyuan Li; Haichun Zhang; Zhenglin Liu; Gang Qu 001 (IEEE Trans. Intell. Transp. Syst., 2024)

A Low-Power Variation-Tolerant 7T SRAM With Enhanced Read Sensing Margin for Voltage Scaling. - Xi Deng; Runze Yu; Zhenhao Li; Haoming Zhang; Zhenglin Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

iEDCL: Streamlined, False-Error-Free Error Detection and Correction Scheme in a Near-Threshold Enabled 32-bit Processor. - Runze Yu; Zhenhao Li; Xi Deng; Zhaoxu Wang; Wei Jia; Haoming Zhang; Zhenglin Liu (IEEE Trans. Very Large Scale Integr. Syst., 2024)