High Performance Data Encryption with AES Implementation on FPGA. - Shuang Chen; Wei Hu 001; Zhenhao Li 004 (BigDataSecurity/HPSC/IDS, 2019)

Design and Implementation of CNN Custom Processor Based on RISC-V Architecture. - Zhenhao Li 004; Wei Hu 001; Shuang Chen (HPCC/SmartCity/DSS, 2019)

Data Optimization CNN Accelerator Design on FPGA. - Wei Hu 001; Shuang Chen; Zhenhao Li 004; Tianyi Liu; Yining Li (ISPA/BDCloud/SocialCom/SustainCom, 2019)

Design of a Convolutional Neural Network Instruction Set Based on RISC-V and Its Microarchitecture Implementation. - Qiang Jiao; Wei Hu 001; Yuan Wen; Yong Dong; Zhenhao Li 004; Yu Gan 004 (ICA3PP (2), 2020)