Automatic Synthesis of Practical Passive Filters Using Clonal Selection Principle-Based Gene Expression Programming. - Zhaohui Gan; Zhenkun Yang; Gaobin Li; Min Jiang (ICES, 2007)

Optimal Components Selection for Analog Active Filters Using Clonal Selection Algorithms. - Min Jiang; Zhenkun Yang; Zhaohui Gan (ICIC (1), 2007)

Automatic Modeling of Complex Functions with Clonal Selection-Based Gene Expression Programming. - Zhaohui Gan; Zhenkun Yang; Gaobin Li; Min Jiang (ICNC (4), 2007)

Automated synthesis of passive analog filters using graph representation. - Zhaohui Gan; Zhenkun Yang; Tao Shang; Tianyou Yu; Min Jiang (Expert Syst. Appl., 2010)

Handling design and implementation optimizations in equivalence checking for behavioral synthesis. - Zhenkun Yang; Sandip Ray; Kecheng Hao; Fei Xie 004 (DAC, 2013)

Equivalence checking for compiler transformations in behavioral synthesis. - Zhenkun Yang; Kecheng Hao; Kai Cong; Sandip Ray; Fei Xie 004 (ICCD, 2013)

A Scalable, Continuously Available Database System Based on Commodity Hardware. - Zhenkun Yang (WAIM Workshops, 2013)

Scalable Certification Framework for Behavioral Synthesis Front-End. - Zhenkun Yang; Kecheng Hao; Kai Cong; Li Lei; Sandip Ray; Fei Xie 004 (DAC, 2014)

Coverage evaluation of post-silicon validation tests with virtual prototypes. - Kai Cong; Li Lei; Zhenkun Yang; Fei Xie (DATE, 2014)

Validating direct memory access interfaces with conformance checking. - Li Lei; Kai Cong; Zhenkun Yang; Fei Xie (ICCAD, 2014)

Automatic fault injection for driver robustness testing. - Kai Cong; Li Lei; Zhenkun Yang; Fei Xie (ISSTA, 2015)

Generating high coverage tests for SystemC designs using symbolic execution. - Bin Lin; Zhenkun Yang; Kai Cong; Fei Xie (ASP-DAC, 2016)

Validating scheduling transformation for behavioral synthesis. - Zhenkun Yang; Kecheng Hao; Kai Cong; Li Lei; Sandip Ray; Fei Xie 004 (DATE, 2016)

OpenRISC System-on-Chip Design Emulation. - Kai Cong; Li Lei; Zhenkun Yang; Fei Xie (CoRR, 2016)

Schedulability analysis of non-preemptive strictly periodic tasks in multi-core real-time systems. - Jinchao Chen; Chenglie Du; Fei Xie; Zhenkun Yang (Real Time Syst., 2016)

CRETE: A Versatile Binary-Level Concolic Testing Framework. - Bo Chen 008; Christopher Havlicek; Zhenkun Yang; Kai Cong; Raghudeep Kannavara; Fei Xie 004 (FASE, 2018)

Concolic testing of SystemC designs. - Bin Lin; Kai Cong; Zhenkun Yang; Zhi-gang Liao; Tao Zhan; Christopher Havlicek; Fei Xie (ISQED, 2018)

End-to-End Concolic Testing for Hardware/Software Co-Validation. - Bo Chen 008; Kai Cong; Zhenkun Yang; Qin Wang; Jialu Wang; Li Lei; Fei Xie 004 (ICESS, 2019)

A Novel Data-Driven Fault Classification Method and its Application to DC Motor. - Tianyu Liu 003; Hao Luo 003; Zhenkun Yang (ICIT, 2019)

Hardware/Software Co-monitoring. - Li Lei; Kai Cong; Zhenkun Yang; Bo Chen 008; Fei Xie 004 (CoRR, 2019)

Asymmetric Convolution Networks Based on Multi-feature Fusion for Object Detection. - Zhenkun Yang; Xianghua Ma; Jing An (CASE, 2020)

UEFI Firmware Fuzzing with Simics Virtual Platform. - Zhenkun Yang; Yuriy Viktorov; Jin Yang 006; Jiewen Yao; Vincent Zimmer (DAC, 2020)

Automated Bug Detection and Replay for COTS Linux Kernel Modules with Concolic Execution. - Bo Chen; Zhenkun Yang; Li Lei; Kai Cong; Fei Xie (SANER, 2020)

Anti-swing strategy of overhead cranes based on prescribed performance PID control. - Xianghua Ma; Zhenkun Yang; Wei Lin; Wenjie Li; Gang Wu; Bin Wei (Int. J. Wirel. Mob. Comput., 2020)

Multiscale Feature Filtering Network for Image Recognition System in Unmanned Aerial Vehicle. - Xianghua Ma; Zhenkun Yang; Shining Chen (Complex., 2021)

Dense short connection network for efficient image classification. - Zhenkun Yang; Xianghua Ma; Kefan Wang; Jing An 001 (Concurr. Comput. Pract. Exp., 2021)

A Highly Configurable Hardware/Software Stack for DNN Inference Acceleration. - Suvadeep Banerjee; Steve Burns 002; Pasquale Cocchini; Abhijit Davare; Shweta Jain 005; Desmond Kirkpatrick; Anton Sorokin; Jin Yang 006; Zhenkun Yang (CoRR, 2021)

FirVer: Concolic Testing for Systematic Validation of Firmware Binaries. - Tashfia Alam; Zhenkun Yang; Bo Chen; Nicholas Armour; Sandip Ray (ASP-DAC, 2022)

Accelerator design with decoupled hardware customizations: benefits and challenges: invited. - Debjit Pal; Yi-Hsiang Lai; Shaojie Xiang; Niansong Zhang; Hongzheng Chen; Jeremy Casas; Pasquale Cocchini; Zhenkun Yang; Jin Yang 006; Louis-Noël Pouchet; Zhiru Zhang (DAC, 2022)

Methods and Datasets of Text to Image Synthesis Based on Generative Adversarial Network. - Junjie Li; Tongfei Sun; Zhenkun Yang; Zhoutong Yuan (ICISCAE, 2022)

OceanBase: A 707 Million tpmC Distributed Relational Database System. - Zhenkun Yang; Chuanhui Yang; Fusheng Han; Mingqiang Zhuang; Bing Yang; Zhifeng Yang; Xiaojun Cheng; Yuzhong Zhao; Wenhui Shi; Huafeng Xi; Huang Yu; Bin Liu; et al. (Proc. VLDB Endow., 2022)

An Equivalence Checking Framework for Agile Hardware Design. - Yanzhao Wang; Fei Xie 004; Zhenkun Yang; Pasquale Cocchini; Jin Yang 006 (ASP-DAC, 2023)

Towards A Formally Verified Fully Homomorphic Encryption Compute Engine. - Jeremy Casas; Zhenkun Yang; Wen Wang; Jin Yang 006; Adwait Godbole (DAC, 2023)

Invited: A Scalable Formal Approach for Correctness-Assured Hardware Design. - Jin Yang 006; Jeremy Casas; Zhenkun Yang (DAC, 2023)

An Automated Verification Framework for HalideIR-Based Compiler Transformations. - Yanzhao Wang; Fei Xie 004; Zhenkun Yang; Jeremy Casas; Pasquale Cocchini; Jin Yang 006 (DATE, 2023)

A Design Method of Aero-Engine Labyrinth Seal Parameters Based on AGA-BP Neural Network. - Zhenkun Yang; Bin He 003; Ping Lu 013; Gang Li 020; Wenji Chen (ICARM, 2023)

LCL: A Lock Chain Length-based Distributed Algorithm for Deadlock Detection and Resolution. - Zhenkun Yang; Chen Qian; Xuwang Teng; Fanyu Kong; Fusheng Han; Quanqing Xu (ICDE, 2023)

Certifying Sequential Consistency of Machine Learning Accelerators. - Huan Wu; Fei Xie; Zhenkun Yang (ICFEM, 2023)

Towards A Correct-by-Construction FHE Model. - Zhenkun Yang; Wen Wang; Jeremy Casas; Pasquale Cocchini; Jin Yang 006 (IACR Cryptol. ePrint Arch., 2023)

Multigrained Hybrid Neural Network for Rotating Machinery Fault Diagnosis Using Joint Local and Global Information. - Zhenkun Yang; Bin He 003; Gang Li 020; Ping Lu 013; Bin Cheng 008; Pengpeng Zhang (IEEE Trans. Instrum. Meas., 2023)

Correct-by-Construction Design of Custom Accelerator Microarchitectures. - Jin Yang 006; Zhenkun Yang; Jeremy Casas; Sandip Ray (IEEE Trans. Computers, 2024)

PALF: Replicated Write-ahead Logging for Distributed Databases. - Fusheng Han; Hao Liu; Bin Chen; Debin Jia; Jianfeng Zhou; Xuwang Teng; Chuanhui Yang; Huafeng Xi; Wei Tian; Shuning Tao; Sen Wang; Quanqing Xu; et al. (Proc. VLDB Endow., 2024)

A Systematic Translation Validation Framework for MLIR-Based Compilers. - Yanzhao Wang; Fei Xie 004; Zhenkun Yang; Pasquale Cocchini; Jin Yang 006 (Int. J. Softw. Eng. Knowl. Eng., 2024)

EBMGC-GNF: Efficient Balanced Multi-View Graph Clustering via Good Neighbor Fusion. - Danyang Wu; Zhenkun Yang; Jitao Lu; Jin Xu 014; Xiangmin Xu; Feiping Nie 001 (IEEE Trans. Pattern Anal. Mach. Intell., 2024)

Formal Verification of a Custom Compiler for a Fully Homomorphic Encryption Accelerator. - Zhenkun Yang; Suvadeep Banerjee; Jeremy Casas; Jin Yang 006 (ISQED, 2025)

MaLT: A Framework for Managing Large Transactions in OceanBase. - Chenguang Fang; Chen Qian; Qi Yang; Zeyu Wang; Zhenkun Yang; Fanyu Kong; Quanqing Xu; Hui Cao; Fusheng Han; Chuanhui Yang (SIGMOD Conference Companion, 2025)