Fragmentation based D-MAC Protocol in Wireless Ad Hoc Network. - Zhenmin Li; Pin Zhou; Jennifer C. Hou (ICDCS, 2003)

Performance directed energy management for main memory and disks. - Xiaodong Li; Zhenmin Li; Francis M. David; Pin Zhou; Yuanyuan Zhou 001; Sarita V. Adve; Sanjeev Kumar (ASPLOS, 2004)

C-Miner: Mining Block Correlations in Storage Systems. - Zhenmin Li; Zhifeng Chen; Sudarshan M. Srinivasan; Yuanyuan Zhou 001 (FAST, 2004)

Reducing Energy Consumption of Disk Storage Using Power-Aware Cache Management. - Qingbo Zhu; Francis M. David; Christo Frank Devaraj; Zhenmin Li; Yuanyuan Zhou 001; Pei Cao (HPCA, 2004)

CP-Miner: A Tool for Finding Copy-paste and Related Bugs in Operating System Code. - Zhenmin Li; Shan Lu 001; Suvda Myagmar; Yuanyuan Zhou 001 (OSDI, 2004)

Performance-Directed Energy Management for Storage Systems. - Xiaodong Li; Zhenmin Li; Pin Zhou; Yuanyuan Zhou 001; Sarita V. Adve; Sanjeev Kumar (IEEE Micro, 2004)

PR-Miner: automatically extracting implicit programming rules and detecting violations in large software code. - Zhenmin Li; Yuanyuan Zhou (ESEC/SIGSOFT FSE, 2005)

Mining block correlations to improve storage performance. - Zhenmin Li; Zhifeng Chen; Yuanyuan Zhou 001 (ACM Trans. Storage, 2005)

Performance directed energy management for main memory and disks. - Xiaodong Li; Zhenmin Li; Yuanyuan Zhou 001; Sarita V. Adve (ACM Trans. Storage, 2005)

Have things changed now?: an empirical study of bug characteristics in modern open source software. - Zhenmin Li; Lin Tan 001; Xuanhui Wang; Shan Lu 001; Yuanyuan Zhou 001; Chengxiang Zhai (ASID, 2006)

LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks. - Feng Qin 003; Cheng Wang 013; Zhenmin Li; Ho-Seop Kim; Yuanyuan Zhou 001; Youfeng Wu (MICRO, 2006)

CP-Miner: Finding Copy-Paste and Related Bugs in Large-Scale Software Code. - Zhenmin Li; Shan Lu 001; Suvda Myagmar; Yuanyuan Zhou 001 (IEEE Trans. Software Eng., 2006)

Using Data Mining Techniques to Improve Software Reliability - Zhenmin Li (2006)

Address Code Optimization Exploiting Code Scheduling in DSP Applications. - Zhenmin Li; Taewhan Kim (ISCAS, 2007)

MUVI: automatically inferring multi-variable access correlations and detecting related semantic and concurrency bugs. - Shan Lu 001; Soyeon Park; Chongfeng Hu; Xiao Ma 014; Weihang Jiang; Zhenmin Li; Raluca A. Popa; Yuanyuan Zhou 001 (SOSP, 2007)

CISpan: Comprehensive Incremental Mining Algorithms of Closed Sequential Patterns for Multi-Versional Software Mining. - Ding Yuan 004; Kyuhyung Lee; Hong Cheng 001; Gopal Krishna; Zhenmin Li; Xiao Ma 014; Yuanyuan Zhou 001; Jiawei Han 001 (SDM, 2008)

Understanding Customer Problem Troubleshooting from Storage System Logs. - Weihang Jiang; Chongfeng Hu; Shankar Pasupathy; Arkady Kanevsky; Zhenmin Li; Yuanyuan Zhou 001 (FAST, 2009)

GALS-CMP: Chip-Multiprocessor for GALS Embedded Systems. - Muhammad Nadeem; HeeJong Park 001; Zhenmin Li; Morteza Biglari-Abhari; Zoran Salcic (ARCS, 2013)

Study on the precision evaluation index in building seismic damage information extraction from remote sensing image. - Zhenmin Li; Aixia Dou; Xiaoqing Wang (IGARSS, 2014)

TACO: A scalable framework for timing analysis and code optimization of synchronous programs. - Zhenmin Li; Avinash Malik; Zoran A. Salcic (RTCSA, 2014)

Bug characteristics in open source software. - Lin Tan 001; Chen Liu; Zhenmin Li; Xuanhui Wang; Yuanyuan Zhou 001; ChengXiang Zhai (Empir. Softw. Eng., 2014)

Reducing Worst Case Reaction Time of Synchronous Programs on Chip-multiprocessors with Application-Specific TDMA Scheduling. - Zhenmin Li; Avinash Malik; Zoran A. Salcic (JTRES, 2015)

Times Square - Marriage of Real-Time and Logical-Time in GALS and Synchronous Languages. - HeeJong Park 001; Zhenmin Li; Avinash Malik; Zoran A. Salcic (J. Signal Process. Syst., 2016)

SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress). - Gaoming Du; Shibi Ma; Zhenmin Li; Zhonghai Lu; Yiming Ouyang; Minglun Gao (CASES, 2017)

On the Accuracy of Stochastic Delay Bound for Network on Chip. - Gaoming Du; Yongliang Zhang; Zhenmin Li; Guanyu Liu; Duoli Zhang; Yiming Ouyang (NOCS, 2017)

Using design space exploration for finding schedules with guaranteed reaction times of synchronous programs on multi-core architecture. - Zhenmin Li; HeeJong Park 001; Avinash Malik; Kevin I-Kai Wang; Zoran Salcic; Boris Kuzmin; Michael Glaß; Jürgen Teich (J. Syst. Archit., 2017)

Efficient Softmax Hardware Architecture for Deep Neural Networks. - Gaoming Du; Chao Tian; Zhenmin Li; Duoli Zhang; Yongsheng Yin; Yiming Ouyang (ACM Great Lakes Symposium on VLSI, 2019)

NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator. - Gaoming Du; Zhenwen Yang; Zhenmin Li; Duoli Zhang; Yongsheng Yin; Zhonghai Lu (ICCD, 2019)

A Survey on Multimodal Data-Driven Smart Healthcare Systems: Approaches and Applications. - Qiong Cai; Hao Wang 081; Zhenmin Li; Xiao Liu 004 (IEEE Access, 2019)

Smart electronic gastroscope system using a cloud-edge collaborative framework. - Shuai Ding 001; Ling Li; Zhenmin Li; Hao Wang 081; Yanchun Zhang (Future Gener. Comput. Syst., 2019)

Diabetic complication prediction using a similarity-enhanced latent Dirichlet allocation model. - Shuai Ding 001; Zhenmin Li; Xiao Liu 004; Hui Huang; Shanlin Yang (Inf. Sci., 2019)

SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method. - Gaoming Du; Guanyu Liu; Zhenmin Li; Yifan Cao; Duoli Zhang; Yiming Ouyang; Minglun Gao; Zhonghai Lu (ACM J. Emerg. Technol. Comput. Syst., 2019)

Allocation and scheduling of SystemJ programs on chip multiprocessors with weighted TDMA scheduling. - Muhammad Nadeem; Zhenmin Li; Avinash Malik; Morteza Biglari-Abhari; Zoran Salcic (J. Syst. Archit., 2019)

A low-latency DMM-1 encoder for 3D-HEVC. - Gaoming Du; Yifan Cao; Zhenmin Li; Duoli Zhang; Li Wang; Yu-Kun Song; Yiming Ouyang (J. Real Time Image Process., 2020)

Optimization of Node-clustering-based DAG partition targeting NVDLA Architecture. - Shijie Hu; Gaoming Du; Jiashen Li; Zhenmin Li; Wei Ni; Yongsheng Yin; Xiaolei Wang (ASICON, 2021)

Algorithm-hardware co-design of ultra-high radix based high throughput modular multiplier. - Hao Xiao; Yuxuan Liu; Zhenmin Li; Guangzhu Liu (IEICE Electron. Express, 2021)

MSCI: A multistate dataset for colposcopy image classification of cervical cancer screening. - Yao Yu; Jie Ma; Weidong Zhao; Zhenmin Li; Shuai Ding 001 (Int. J. Medical Informatics, 2021)

An abnormal event detection method based on the Riemannian manifold and LSTM network. - Limin Xia; Zhenmin Li (Neurocomputing, 2021)

Design of node separated triple-node-upset self-recoverable latch. - Zhengfeng Huang; Di Cao; Jianguo Cui; Yingchun Lu; Huaguo Liang; Yiming Ouyang; Tianming Ni; Zhenmin Li (Microelectron. J., 2021)

SCNET: A Novel UGI Cancer Screening Framework Based on Semantic-Level Multimodal Data Fusion. - Shuai Ding 001; Hui Huang; Zhenmin Li; Xiao Liu 004; Shanlin Yang (IEEE J. Biomed. Health Informatics, 2021)

A new method of abnormal behavior detection using LSTM network with temporal attention mechanism. - Limin Xia; Zhenmin Li (J. Supercomput., 2021)

A Real-Time Effective Fusion-Based Image Defogging Architecture on FPGA. - Gaoming Du; Jiting Wu; Hongfang Cao; Kun Xing; Zhenmin Li; Duoli Zhang; Xiaolei Wang (ACM Trans. Multim. Comput. Commun. Appl., 2021)

RB-OLITS: A Worst Case Reorder Buffer Size Reduction Approach for 3-D-NoC. - Zhenmin Li; Yuqing Ma; Gaoming Du; Xiaolei Wang; Yukun Song; Duoli Zhang (IEEE Des. Test, 2022)

A BNN Accelerator Based on Edge-skip-calculation Strategy and Consolidation Compressed Tree. - Gaoming Du; Bangyi Chen; Zhenmin Li; Zhenxing Tu; Junjie Zhou; Shenya Wang; Qinghao Zhao; Yongsheng Yin; Xiaolei Wang (ACM Trans. Reconfigurable Technol. Syst., 2022)

Design of a Data Transmission Control Unit in a Multi-core DSP System. - Hu Ge; Qiao Yuan; Yuhao Zhang; Yukun Song; Zhenmin Li (ASICON, 2023)

An Area-Efficient Large Integer NTT-Multiplier Using Discrete Twiddle Factor Approach. - Zhenmin Li; Jingwei Ren; Gaoming Du; Zhenxing Tu; Xiaolei Wang; Yongsheng Yin; Yiming Ouyang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A Low-Latency Polynomial Multiplier Accelerator for CRYSTALS-Dilithium Digital Signature. - Gaoming Du; Zhuo Chen; Zhenmin Li; Xiaolei Wang; Duoli Zhang (ACM Great Lakes Symposium on VLSI, 2024)

ICLTR: A Input-split Inverters and C-elements based Low-Cost Latch with Triple-Node-Upset Recovery. - Jiajia Zhang; Zhenmin Li; Gaoyang Shan; Jie Song; Xing Guo; Xiaoqing Wen (ITC-Asia, 2024)

Enhancing Digital Hologram Reconstruction Using Reverse-Attention Loss for Untrained Physics-Driven Deep Learning Models with Uncertain Distance. - Xiwen Chen; Hao Wang 176; Zhao Zhang; Zhenmin Li; Huayu Li; Tong Ye; Abolfazl Razi (CoRR, 2024)

A fast hardware accelerator for nighttime fog removal based on image fusion. - Tianyi Lv; Gaoming Du; Zhenmin Li; Xiaolei Wang; Peiyi Teng; Wei Ni; Yiming Ouyang (Integr., 2024)

An Efficient Ring Polynomial Multiplication Accelerator for Homomorphic Encryption. - Jingwei Ren; Gaoming Du; Zhenmin Li; Xianhu Jia; Qiuzhu Liao; Xiaolei Wang; Duoli Zhang (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

High-speed hardware accelerator based on brightness improved by Light-DehazeNet. - Peiyi Teng; Gaoming Du; Zhenmin Li; Xiaolei Wang; Yongsheng Yin (J. Real Time Image Process., 2024)

An energy-efficient dehazing neural network accelerator based on E2AOD-Net. - Zhihao Zhang; Gaoming Du; Zhenmin Li; Qinran Kang; Wenyao Zhao; Xiaolei Wang (J. Real Time Image Process., 2024)

Image encryption/decryption accelerator based on Fast Cosine Number Transform. - Zhiqiang Xu; Zhenmin Li; Feng Han; Xiaolei Wang; Gaoming Du (Integr., 2025)

An efficient dehazing accelerator by fusing dark channel prior and guided filter. - Tianyi Lv; Wei Mao; Zhenmin Li; Gaoming Du; Xiaolei Wang; Wei Ni; Duoli Zhang (Microelectron. J., 2025)

A high-speed hardware accelerator for lightweight dehazing neural network based on SFA-Net. - Zhe Chen; Gaoming Du; Zhenmin Li; Xiaolei Wang; Yongsheng Yin (J. Real Time Image Process., 2025)

HALTRAV: Design of a High-Performance and Area-Efficient Latch With Triple-Node-Upset Recovery and Algorithm-Based Verifications. - Xing Guo; Jiajia Zhang; Xu Meng; Zhenmin Li; Xiaoqing Wen; Patrick Girard 001; Bin Liang; Aibin Yan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)