An Empirical Study of Qualities of Association Rules from a Statistical View Point. - Maryann Dorn; Zhewei Jiang; Wen-Chi Hou; Chih-Fang Wang (CATA, 2005)

The Design of an Interactive Approach to Statistical Data Mining. - Zhewei Jiang; Yanliang Gu; Wen-Chi Hou; Chih-Fang Wang (CATA, 2005)

Applying cosine series to join size estimation. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou (CIKM, 2005)

The Design of an Interactive Approach to Statistical Data Mining. - Zhewei Jiang; Chih-Fang Wang; Wen-Chi Hou (IKE, 2005)

A Framework for Clustering on Data Streams. - Zhewei Jiang; Wen-Chi Hou; Chih-Fang Wang; Huaqing Wang; Jie Chen (CATA, 2006)

An efficient one-phase holistic twig join algorithm for XML data. - Zhewei Jiang; Cheng Luo; Wen-Chi Hou (CIKM, 2006)

Estimating Aggregate Join Queries over Data Streams Using Discrete Cosine Transform. - Zhewei Jiang; Cheng Luo; Wen-Chi Hou; Feng Yan 005; Qiang Zhu 001 (DEXA, 2006)

Applying Cosine Series to XML Structural Join Size Estimation. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou; Qiang Zhu 001; Chih-Fang Wang (DEXA, 2006)

Estimating XML Structural Join Size Quickly and Economically. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou; Feng Yan 005; Chih-Fang Wang (ICDE, 2006)

Efficient Processing of XML Twig Pattern: A Novel One-Phase Holistic Solution. - Zhewei Jiang; Cheng Luo; Wen-Chi Hou; Qiang Zhu 001; Dunren Che (DEXA, 2007)

Selectivity estimation of range queries based on data density approximation via cosine series. - Feng Yan 005; Wen-Chi Hou; Zhewei Jiang; Cheng Luo; Qiang Zhu 001 (Data Knowl. Eng., 2007)

A Data Stream Clustering Algorithm Using Discrete Cosine Transform. - Damalie Oyana; Cheng Luo; Wen-Chi Hou; Zhewei Jiang; Dunren Che (CATA, 2008)

Approximate Range-Sum Queries over Data Cubes Using Cosine Transform. - Wen-Chi Hou; Cheng Luo; Zhewei Jiang; Feng Yan 005; Qiang Zhu 001 (DEXA, 2008)

Improving Concurrency Control with Invalidation Reports in Mobile Databases. - Wen-Chi Hou; Chih-Fang Wang; Qiao Luo; Cheng Luo; Zhewei Jiang (Int. J. Comput. Their Appl., 2008)

An Empirical Study of Qualities of Association Rules from a Statistical View Point. - Maryann Dorn; Wen-Chi Hou; Dunren Che; Zhewei Jiang (J. Inf. Process. Syst., 2008)

A relational model for XML structural joins and their size estimations. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou; Feng Yan 005; Qiang Zhu 001 (Knowl. Inf. Syst., 2008)

Progressive Evaluation of XML Queries for Online Aggregation and Progress Indicator. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou; Gultekin Özsoyoglu (DEXA, 2009)

A sampling approach for XML query selectivity estimation. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou; Feng Yu 002; Qiang Zhu 001 (EDBT, 2009)

An Index Structure and Searching Techniques for Multidimensional Non-ordered Discrete Data Spaces. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou; Shan He; Yi Yu (IKE, 2009)

Efficient XML tree pattern query evaluation using a novel one-phase holistic twig join scheme. - Zhewei Jiang; Cheng Luo; Wen-Chi Hou; Dunren Che; Qiang Zhu 001 (Int. J. Web Inf. Syst., 2009)

IRTA: An Improved Threshold Algorithm for Reverse Top-k Queries. - Cheng Luo; Feng Yu 002; Wen-Chi Hou; Zhewei Jiang; Dunren Che; Shan He (ICEIS (1), 2011)

A sampling approach for skyline query cardinality estimation. - Cheng Luo; Zhewei Jiang; Wen-Chi Hou; Shan He; Qiang Zhu 001 (Knowl. Inf. Syst., 2012)

A low power unsupervised spike sorting accelerator insensitive to clustering initialization in sub-optimal feature space. - Zhewei Jiang; Qi Wang; Mingoo Seok (DAC, 2015)

A neuromorphic neural spike clustering processor for deep-brain sensing and stimulation systems. - Beinuo Zhang; Zhewei Jiang; Qi Wang; Jae-sun Seo; Mingoo Seok (ISLPED, 2015)

1.74-µW/ch, 95.3%-accurate spike-sorting hardware based on Bayesian decision. - Zhewei Jiang; Joao Pedro Cerqueira; Seongjong Kim; Qi Wang; Mingoo Seok (VLSI Circuits, 2016)

Microwatt end-to-End digital neural signal processing systems for motor intention decoding. - Zhewei Jiang; Chisung Bae; Joonseong Kang; Sang Joon Kim; Mingoo Seok (DATE, 2017)

A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit. - Jiangyi Li; Pavan Kumar Chundi; Sung Kim; Zhewei Jiang; Minhao Yang; Joonseong Kang; Seungchul Jung; Sang Joon Kim; Mingoo Seok (ESSCIRC, 2018)

Blacklist Core: Machine-Learning Based Dynamic Operating-Performance-Point Blacklisting for Mitigating Power-Management Security Attacks. - Sheng Zhang; Adrian Tang; Zhewei Jiang; Simha Sethumadhavan; Mingoo Seok (ISLPED, 2018)

Vesti: An In-Memory Computing Processor for Deep Neural Networks Acceleration. - Zhewei Jiang; Shihui Yin; Minkyu Kim 001; Tushar Gupta; Mingoo Seok; Jae-sun Seo (ACSSC, 2019)

C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. - Zhewei Jiang; Shihui Yin; Jae-Sun Seo; Mingoo Seok (ESSCIRC, 2019)

XNOR-SRAM: In-Bitcell Computing SRAM Macro based on Resistive Computing Mechanism. - Zhewei Jiang; Shihui Yin; Jae-sun Seo; Mingoo Seok (ACM Great Lakes Symposium on VLSI, 2019)

K-Nearest Neighbor Hardware Accelerator Using In-Memory Computing SRAM. - Jyotishman Saikia; Shihui Yin; Zhewei Jiang; Mingoo Seok; Jae-sun Seo (ISLPED, 2019)

Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural Networks. - Mingoo Seok; Minhao Yang; Zhewei Jiang; Aurel A. Lazar; Jae-sun Seo (VLSI-DAT, 2019)

KTAN: Knowledge Transfer Adversarial Network. - Peiye Liu; Wu Liu; Huadong Ma; Zhewei Jiang; Mingoo Seok (IJCNN, 2020)

An Energy-Efficient and High Throughput in-Memory Computing Bit-Cell With Excellent Robustness Under Process Variations for Binary Neural Network. - Gobinda Saha; Zhewei Jiang; Sanjay Parihar; Xi Cao; Jack M. Higman; Muhammed Ahosan Ul Karim (IEEE Access, 2020)

C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism. - Zhewei Jiang; Shihui Yin; Jae-Sun Seo; Mingoo Seok (IEEE J. Solid State Circuits, 2020)

XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks. - Shihui Yin; Zhewei Jiang; Jae-Sun Seo; Mingoo Seok (IEEE J. Solid State Circuits, 2020)

Vesti: Energy-Efficient In-Memory Computing Accelerator for Deep Neural Networks. - Shihui Yin; Zhewei Jiang; Minkyu Kim 001; Tushar Gupta; Mingoo Seok; Jae-Sun Seo (IEEE Trans. Very Large Scale Integr. Syst., 2020)

DCIM Compiler - Physical Design Generator. - Zhewei Jiang; Hungkei Chow; Dragan Samardzija (NewCAS, 2024)