A 100 MHz, 0.8-to-1.1 V, 170 mA Digital LDO With 8-Cycles Mean Settling Time and 9-Bit Regulating Resolution in 180-nm CMOS. - Zheyi Yuan; Shiquan Fan; Chenxi Yuan; Li Geng (IEEE Trans. Circuits Syst. II Express Briefs, 2020)