A Low Power Current-Mode Flash ADC with Spin Hall Effect based Multi-Threshold Comparator. - Zhezhi He; Deliang Fan (ISLPED, 2016)

A tunable magnetic skyrmion neuron cluster for energy efficient artificial neural network. - Zhezhi He; Deliang Fan (DATE, 2017)

Energy Efficient In-Memory Computing Platform Based on 4-Terminal Spin Hall Effect-Driven Domain Wall Motion Devices. - Shaahin Angizi; Zhezhi He; Deliang Fan (ACM Great Lakes Symposium on VLSI, 2017)

Leveraging Dual-Mode Magnetic Crossbar for Ultra-low Energy In-memory Data Encryption. - Zhezhi He; Shaahin Angizi; Farhana Parveen; Deliang Fan (ACM Great Lakes Symposium on VLSI, 2017)

Exploring STT-MRAM Based In-Memory Computing Paradigm with Application of Image Edge Extraction. - Zhezhi He; Shaahin Angizi; Deliang Fan (ICCD, 2017)

Hybrid polymorphic logic gate using 6 terminal magnetic domain wall motion device. - Farhana Parveen; Shaahin Angizi; Zhezhi He; Deliang Fan (ISCAS, 2017)

Low power in-memory computing based on dual-mode SOT-MRAM. - Farhana Parveen; Shaahin Angizi; Zhezhi He; Deliang Fan (ISLPED, 2017)

Composite spintronic accuracy-configurable adder for low power Digital Signal Processing. - Shaahin Angizi; Zhezhi He; Ronald F. DeMara; Deliang Fan (ISQED, 2017)

RIMPA: A New Reconfigurable Dual-Mode In-Memory Processing Architecture with Spin Hall Effect-Driven Domain Wall Motion Device. - Shaahin Angizi; Zhezhi He; Farhana Parveen; Deliang Fan (ISVLSI, 2017)

In-Memory Computing with Spintronic Devices. - Deliang Fan; Shaahin Angizi; Zhezhi He (ISVLSI, 2017)

Hybrid Polymorphic Logic Gate with 5-Terminal Magnetic Domain Wall Motion Device. - Farhana Parveen; Zhezhi He; Shaahin Angizi; Deliang Fan (ISVLSI, 2017)

Leveraging spintronic devices for ultra-low power in-memory computing: Logic and neural network. - Deliang Fan; Zhezhi He; Shaahin Angizi (MWSCAS, 2017)

High performance and energy-efficient in-memory computing architecture based on SOT-MRAM. - Zhezhi He; Shaahin Angizi; Farhana Parveen; Deliang Fan (NANOARCH, 2017)

Current Induced Dynamics of Multiple Skyrmions with Domain Wall Pair and Skyrmion-based Majority Gate Design. - Zhezhi He; Shaahin Angizi; Deliang Fan (CoRR, 2017)

Developing All-Skyrmion Spiking Neural Network. - Zhezhi He; Deliang Fan (CoRR, 2017)

Energy Efficient Reconfigurable Threshold Logic Circuit with Spintronic Devices. - Zhezhi He; Deliang Fan (IEEE Trans. Emerg. Top. Comput., 2017)

IMCE: Energy-efficient bit-wise in-memory convolution engine for deep neural network. - Shaahin Angizi; Zhezhi He; Farhana Parveen; Deliang Fan (ASP-DAC, 2018)

HielM: Highly flexible in-memory computing using STT MRAM. - Farhana Parveen; Zhezhi He; Shaahin Angizi; Deliang Fan (ASP-DAC, 2018)

PIMA-logic: a novel processing-in-memory architecture for highly flexible and energy-efficient logic computation. - Shaahin Angizi; Zhezhi He; Deliang Fan (DAC, 2018)

CMP-PIM: an energy-efficient comparator-based processing-in-memory neural network accelerator. - Shaahin Angizi; Zhezhi He; Adnan Siraj Rakin; Deliang Fan (DAC, 2018)

Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks. - Shaahin Angizi; Zhezhi He; Yu Bai 004; Jie Han 001; Mingjie Lin; Ronald F. DeMara; Deliang Fan (ACM Great Lakes Symposium on VLSI, 2018)

DIMA: a depthwise CNN in-memory accelerator. - Shaahin Angizi; Zhezhi He; Deliang Fan (ICCAD, 2018)

PIM-TGAN: A Processing-in-Memory Accelerator for Ternary Generative Adversarial Networks. - Adnan Siraj Rakin; Shaahin Angizi; Zhezhi He; Deliang Fan (ICCD, 2018)

A Fully Onchip Binarized Convolutional Neural Network FPGA Impelmentation with Accurate Inference. - Li Yang 009; Zhezhi He; Deliang Fan (ISLPED, 2018)

Accelerating Low Bit-Width Deep Convolution Neural Network in MRAM. - Zhezhi He; Shaahin Angizi; Deliang Fan (ISVLSI, 2018)

BD-NET: A Multiplication-Less DNN with Binarized Depthwise Separable Convolution. - Zhezhi He; Shaahin Angizi; Adnan Siraj Rakin; Deliang Fan (ISVLSI, 2018)

Blind Pre-Processing: A Robust Defense Method Against Adversarial Examples. - Adnan Siraj Rakin; Zhezhi He; Boqing Gong; Deliang Fan (CoRR, 2018)

Design and Evaluation of a Spintronic In-Memory Processing Platform for Nonvolatile Data Encryption. - Shaahin Angizi; Zhezhi He; Nader Bagherzadeh; Deliang Fan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Exploring a SOT-MRAM Based In-Memory Computing for Data Processing. - Zhezhi He; Yang Zhang 035; Shaahin Angizi; Boqing Gong; Deliang Fan (IEEE Trans. Multi Scale Comput. Syst., 2018)

ParaPIM: a parallel processing-in-memory accelerator for binary-weight deep neural networks. - Shaahin Angizi; Zhezhi He; Deliang Fan (ASP-DAC, 2019)

Simultaneously Optimizing Weight and Quantizer of Ternary Neural Network Using Truncated Gaussian Approximation. - Zhezhi He; Deliang Fan (CVPR, 2019)

Parametric Noise Injection: Trainable Randomness to Improve Deep Neural Network Robustness Against Adversarial Attack. - Zhezhi He; Adnan Siraj Rakin; Deliang Fan (CVPR, 2019)

Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping. - Zhezhi He; Jie Lin 004; Rickard Ewetz; Jiann-Shiun Yuan; Deliang Fan (DAC, 2019)

Artificial Neuron using Ag/2D-MoS2/Au Threshold Switching Memristor. - Durjoy Dev; Adithi Krishnaprasad; Zhezhi He; Sonali Das; Mashiyat Sumaiya Shawkat; Madison Manley; Olaleye Aina; Deliang Fan; Yeonwoong Jung; Tania Roy (DRC, 2019)

Binarized Depthwise Separable Neural Network for Object Tracking in FPGA. - Li Yang 009; Zhezhi He; Deliang Fan (ACM Great Lakes Symposium on VLSI, 2019)

Bit-Flip Attack: Crushing Neural Network With Progressive Bit Search. - Adnan Siraj Rakin; Zhezhi He; Deliang Fan (ICCV, 2019)

Accelerating Deep Neural Networks in Processing-in-Memory Platforms: Analog or Digital Approach? - Shaahin Angizi; Zhezhi He; Dayane Alfenas Reis; Xiaobo Sharon Hu; Wilman Tsai; Shy Jay Lin; Deliang Fan (ISVLSI, 2019)

Optimize Deep Convolutional Neural Network with Ternarized Weights and High Accuracy. - Zhezhi He; Boqing Gong; Deliang Fan (WACV, 2019)

Bit-Flip Attack: Crushing Neural Network withProgressive Bit Search. - Adnan Siraj Rakin; Zhezhi He; Deliang Fan (CoRR, 2019)

Robust Sparse Regularization: Simultaneously Optimizing Neural Network Robustness and Compactness. - Adnan Siraj Rakin; Zhezhi He; Li Yang 009; Yanzhi Wang; Liqiang Wang 001; Deliang Fan (CoRR, 2019)

Non-structured DNN Weight Pruning Considered Harmful. - Yanzhi Wang; Shaokai Ye; Zhezhi He; Xiaolong Ma; Linfeng Zhang 001; Sheng Lin 001; Geng Yuan; Sia Huat Tan; Zhengang Li; Deliang Fan; Xuehai Qian; Xue Lin 001; et al. (CoRR, 2019)

Harmonious Coexistence of Structured Weight Pruning and Ternarization for Deep Neural Networks. - Li Yang 009; Zhezhi He; Deliang Fan (AAAI, 2020)

Defending and Harnessing the Bit-Flip Based Adversarial Weight Attack. - Zhezhi He; Adnan Siraj Rakin; Jingtao Li; Chaitali Chakrabarti; Deliang Fan (CVPR, 2020)

TBT: Targeted Neural Network Attack With Bit Trojan. - Adnan Siraj Rakin; Zhezhi He; Deliang Fan (CVPR, 2020)

Defending Bit-Flip Attack through DNN Weight Reconstruction. - Jingtao Li; Adnan Siraj Rakin; Yan Xiong 002; Liangliang Chang; Zhezhi He; Deliang Fan; Chaitali Chakrabarti (DAC, 2020)

Non-uniform DNN Structured Subnets Sampling for Dynamic Inference. - Li Yang 009; Zhezhi He; Yu Cao 001; Deliang Fan (DAC, 2020)

Robust Sparse Regularization: Defending Adversarial Attacks Via Regularized Sparse Network. - Adnan Siraj Rakin; Zhezhi He; Li Yang 009; Yanzhi Wang; Liqiang Wang 001; Deliang Fan (ACM Great Lakes Symposium on VLSI, 2020)

Processing-in-Memory Accelerator for Dynamic Neural Network with Run-Time Tuning of Accuracy, Power and Latency. - Li Yang 009; Zhezhi He; Shaahin Angizi; Deliang Fan (SoCC, 2020)

Network-based multi-task learning models for biomarker selection and cancer outcome prediction. - Zhibo Wang; Zhezhi He; Milan Shah; Teng Zhang 002; Deliang Fan; Wei Zhang 076 (Bioinform., 2020)

A Progressive Sub-Network Searching Framework for Dynamic Inference. - Li Yang 009; Zhezhi He; Yu Cao 001; Deliang Fan (CoRR, 2020)

Sparse BD-Net: A Multiplication-less DNN with Sparse Binarized Depth-wise Separable Convolution. - Zhezhi He; Li Yang 009; Shaahin Angizi; Adnan Siraj Rakin; Deliang Fan (ACM J. Emerg. Technol. Comput. Syst., 2020)

MRIMA: An MRAM-Based In-Memory Accelerator. - Shaahin Angizi; Zhezhi He; Amro Awad; Deliang Fan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Efficient and Secure Deep Learning Inference System: A Software and Hardware Co-design Perspective. - Zhezhi He (2020)

AdaptiveGCN: Efficient GCN Through Adaptively Sparsifying Graphs. - Dongyue Li; Tao Yang 031; Lun Du; Zhezhi He; Li Jiang 002 (CIKM, 2021)

KSM: Fast Multiple Task Adaption via Kernel-Wise Soft Mask Learning. - Li Yang 009; Zhezhi He; Junshan Zhang; Deliang Fan (CVPR, 2021)

PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration. - Tao Yang 031; Dongyue Li; Yibo Han; Yilong Zhao; Fangxin Liu; Xiaoyao Liang; Zhezhi He; Li Jiang 002 (DAC, 2021)

RADAR: Run-time Adversarial Weight Attack Detection and Accuracy Recovery. - Jingtao Li; Adnan Siraj Rakin; Zhezhi He; Deliang Fan; Chaitali Chakrabarti (DATE, 2021)

Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support. - Chen Nie; Jie Lin 004; Huan Hu; Li Jiang 002; Xiaoyao Liang; Zhezhi He (ACM Great Lakes Symposium on VLSI, 2021)

Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication. - Yilong Zhao; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (ACM Great Lakes Symposium on VLSI, 2021)

NeurObfuscator: A Full-stack Obfuscation Tool to Mitigate Neural Architecture Stealing. - Jingtao Li; Zhezhi He; Adnan Siraj Rakin; Deliang Fan; Chaitali Chakrabarti (HOST, 2021)

Bit-Transformer: Transforming Bit-level Sparsity into Higher Preformance in ReRAM-based Accelerator. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Zongwu Wang; Yilong Zhao; Yongbiao Chen; Li Jiang 002 (ICCAD, 2021)

SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Zongwu Wang; Yilong Zhao; Tao Yang 031; Jingnai Feng; Xiaoyao Liang; Li Jiang 002 (ICCD, 2021)

Improving Neural Network Efficiency via Post-training Quantization with Adaptive Floating-Point. - Fangxin Liu; Wenbo Zhao 005; Zhezhi He; Yanzhi Wang; Zongwu Wang; Changzhi Dai; Xiaoyao Liang; Li Jiang 002 (ICCV, 2021)

A Ternary Memristive Logic-in-Memory Design for Fast Data Scan. - Tianhong Shen; Yanan Sun 003; Weifeng He; Zhi Li 058; Weiyi Liu; Zhezhi He; Li Jiang 002 (ICTA, 2021)

ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator. - Zhuoran Song; Dongyue Li; Zhezhi He; Xiaoyao Liang; Li Jiang 002 (ISCAS, 2021)

MetaGater: Fast Learning of Conditional Channel Gated Networks via Federated Meta-Learning. - Sen Lin 001; Li Yang 009; Zhezhi He; Deliang Fan; Junshan Zhang (MASS, 2021)

Elf: accelerate high-resolution mobile deep vision with content-aware parallel offloading. - Wuyang Zhang; Zhezhi He; Luyang Liu; Zhenhua Jia; Yunxin Liu 001; Marco Gruteser; Dipankar Raychaudhuri; Yanyong Zhang (MobiCom, 2021)

SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. - Fangxin Liu; Wenbo Zhao 005; Yilong Zhao; Zongwu Wang; Tao Yang 031; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (CoRR, 2021)

Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing. - Yanan Sun 003; Chang Ma; Zhi Li 058; Yilong Zhao; Jiachen Jiang; Weikang Qian; Rui Yang; Zhezhi He; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

BISWSRBS: A Winograd-based CNN Accelerator with a Fine-grained Regular Sparsity Pattern and Mixed Precision Quantization. - Tao Yang 031; Zhezhi He; Tengchuan Kou; Qingzheng Li; Qi Han; Haibao Yu; Fangxin Liu; Yun Liang 001; Li Jiang 002 (ACM Trans. Reconfigurable Technol. Syst., 2021)

HAWIS: Hardware-Aware Automated WIdth Search for Accurate, Energy-Efficient and Robust Binary Neural Network on ReRAM Dot-Product Engine. - Qidong Tang; Zhezhi He; Fangxin Liu; Zongwu Wang; Yiyuan Zhou; Yinghuan Zhang; Li Jiang 002 (ASP-DAC, 2022)

ResSFL: A Resistance Transfer Framework for Defending Model Inversion Attack in Split Federated Learning. - Jingtao Li; Adnan Siraj Rakin; Xing Chen 009; Zhezhi He; Deliang Fan; Chaitali Chakrabarti (CVPR, 2022)

PIM-DH: ReRAM-based processing-in-memory architecture for deep hashing acceleration. - Fangxin Liu; Wenbo Zhao 005; Yongbiao Chen; Zongwu Wang; Zhezhi He; Rui Yang; Qidong Tang; Tao Yang 031; Cheng Zhuo; Li Jiang 002 (DAC, 2022)

EBSP: evolving bit sparsity patterns for hardware-friendly inference of quantized deep neural networks. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Yongbiao Chen; Zhezhi He; Naifeng Jing; Xiaoyao Liang; Li Jiang 002 (DAC, 2022)

SATO: spiking neural network acceleration via temporal-oriented dataflow and architecture. - Fangxin Liu; Wenbo Zhao 005; Zongwu Wang; Yongbiao Chen; Tao Yang 031; Zhezhi He; Xiaokang Yang 001; Li Jiang 002 (DAC, 2022)

Self-Terminating Write of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing. - Zongwu Wang; Zhezhi He; Rui Yang; Shiquan Fan; Jie Lin 004; Fangxin Liu; Yueyang Jia; Chenxi Yuan; Qidong Tang; Li Jiang 002 (DATE, 2022)

DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture. - Tao Yang 031; Dongyue Li; Zhuoran Song; Yilong Zhao; Fangxin Liu; Zongwu Wang; Zhezhi He; Li Jiang 002 (DATE, 2022)

N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores. - Yu Gong; Zhihan Xu; Zhezhi He; Weifeng Zhang 003; Xiaobing Tu; Xiaoyao Liang; Li Jiang 002 (FPGA, 2022)

Cross-layer Designs against Non-ideal Effects in ReRAM-based Processing-in-Memory System. - Chen Nie; Zongwu Wang; Qidong Tang; Chenyang Lv; Li Jiang 002; Zhezhi He (ISQED, 2022)

CP-ViT: Cascade Vision Transformer Pruning via Progressive Sparsity Prediction. - Zhuoran Song; Yihong Xu; Zhezhi He; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (CoRR, 2022)

T-BFA: Targeted Bit-Flip Adversarial Weight Attack. - Adnan Siraj Rakin; Zhezhi He; Jingtao Li; Fan Yao; Chaitali Chakrabarti; Deliang Fan (IEEE Trans. Pattern Anal. Mach. Intell., 2022)

Non-Structured DNN Weight Pruning - Is It Beneficial in Any Platform? - Xiaolong Ma; Sheng Lin 001; Shaokai Ye; Zhezhi He; Linfeng Zhang 001; Geng Yuan; Sia Huat Tan; Zhengang Li; Deliang Fan; Xuehai Qian; Xue Lin 001; Kaisheng Ma; et al. (IEEE Trans. Neural Networks Learn. Syst., 2022)

PIMPR: PIM-based Personalized Recommendation with Heterogeneous Memory Hierarchy. - Tao Yang 031; Hui Ma; Yilong Zhao; Fangxin Liu; Zhezhi He; Xiaoli Sun; Li Jiang 002 (DATE, 2023)

XMG-GPPIC: Efficient and Robust General-Purpose Processing-in-Cache with XOR-Majority-Graph. - Chen Nie; Xianjue Cai; Chenyang Lv; Chen Huang; Weikang Qian; Zhezhi He (ACM Great Lakes Symposium on VLSI, 2023)

GPT-LS: Generative Pre-Trained Transformer with Offline Reinforcement Learning for Logic Synthesis. - Chenyang Lv; Ziling Wei; Weikang Qian; Junjie Ye; Chang Feng; Zhezhi He (ICCD, 2023)

GIM: Versatile GNN Acceleration with Reconfigurable Processing-in-Memory. - Chen Nie; Guoyang Chen; Weifeng Zhang 003; Zhezhi He (ICCD, 2023)

HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model. - Xuan Zhang 001; Zhuoran Song; Xing Li; Zhezhi He; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ICCD, 2023)

Model Extraction Attacks on Split Federated Learning. - Jingtao Li; Adnan Siraj Rakin; Xing Chen 009; Li Yang 009; Zhezhi He; Deliang Fan; Chaitali Chakrabarti (CoRR, 2023)

SoBS-X: Squeeze-Out Bit Sparsity for ReRAM-Crossbar-Based Neural Network Accelerator. - Fangxin Liu; Zongwu Wang; Yongbiao Chen; Zhezhi He; Tao Yang 031; Xiaoyao Liang; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

DTATrans: Leveraging Dynamic Token-Based Quantization With Accuracy Compensation Mechanism for Efficient Transformer Architecture. - Tao Yang 031; Fei Ma; Xiaoling Li; Fangxin Liu; Yilong Zhao; Zhezhi He; Li Jiang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A 428.4mW 6.78Mbps/3.61Mbps Up/Down Data Rate Wireless Chipset with TinyAI Regulation. - Yunfang Zhang; Zhijie Lin; Peiyi Zhou; Jie Zhang; Zhezhi He; Hong Zhang; Yongfu Li; Yong Lian; Yang Zhao (A-SSCC, 2024)

An Efficient Logic Operation Scheduler for Minimizing Memory Footprint of In-Memory SIMD Computation. - Xingyue Qian; Zhezhi He; Weikang Qian (DATE, 2024)

PIMLC: Logic Compiler for Bit-Serial Based PIM. - Chenyu Tang; Chen Nie; Weikang Qian; Zhezhi He (DATE, 2024)

BKDSNN: Enhancing the Performance of Learning-Based Spiking Neural Networks Training with Blurred Knowledge Distillation. - Zekai Xu; Kang You; Qinghai Guo; Xiang Wang; Zhezhi He (ECCV (50), 2024)

Watt: A Write-Optimized RRAM-Based Accelerator for Attention. - Xuan Zhang 001; Zhuoran Song; Xing Li; Zhezhi He; Naifeng Jing; Li Jiang 002; Xiaoyao Liang (Euro-Par (2), 2024)

Obtaining Optimal Spiking Neural Network in Sequence Learning via CRNN-SNN Conversion. - Jiahao Su; Kang You; Zekai Xu; Weizhi Xu 001; Zhezhi He (ICANN (10), 2024)

Early: An Importance-Aware Early Firing and Exit for SNN Acceleration. - Xuan Zhang 001; Zhuoran Song; Peng Zhou; Xing Li; Xueyuan Liu 001; Xiaolong Lin; Zhezhi He; Li Jiang 002; Naifeng Jing; Xiaoyao Liang (ICCD, 2024)

CLLMs: Consistency Large Language Models. - Siqi Kou; Lanxiang Hu; Zhezhi He; Zhijie Deng; Hao Zhang (ICML, 2024)

SpikeZIP-TF: Conversion is All You Need for Transformer-based SNN. - Kang You; Zekai Xu; Chen Nie; Zhijie Deng; Qinghai Guo; Xiang Wang; Zhezhi He (ICML, 2024)

Evolving Virtual World with Delta-Engine. - Hongqiu Wu; Zekai Xu; Tianyang Xu; Shize Wei; Yan Wang; Jiale Hong; Weiqi Wu; Hai Zhao 001; Min Zhang 005; Zhezhi He (CoRR, 2024)

High-Quality Iterative Logic Compiler for In-Memory SIMD Computation with Tight Coupling of Synthesis and Scheduling. - Xingyue Qian; Chenyang Lv; Zhezhi He; Weikang Qian (CoRR, 2024)

MASIM: An Efficient Multi-Array Scheduler for In-Memory SIMD Computation. - Xingyue Qian; Chen Nie; Zhezhi He; Weikang Qian (CoRR, 2024)

A Progressive Subnetwork Searching Framework for Dynamic Inference. - Li Yang 009; Zhezhi He; Yu Cao 001; Deliang Fan (IEEE Trans. Neural Networks Learn. Syst., 2024)

VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations. - Chen Nie; Chenyu Tang; Jie Lin 004; Huan Hu; Chenyang Lv; Ting Cao; Weifeng Zhang 003; Li Jiang 002; Xiaoyao Liang; Weikang Qian; Yanan Sun 003; Zhezhi He (IEEE Trans. Computers, 2024)

StreamGrid: Streaming Point Cloud Analytics via Compulsory Splitting and Deterministic Termination. - Yu Feng 007; Zheng Liu; Weikai Lin; Zihan Liu 002; Jingwen Leng; Minyi Guo; Zhezhi He; Jieru Zhao; Yuhao Zhu 001 (ASPLOS (2), 2025)

VISTREAM: Improving Computation Efficiency of Visual Streaming Perception via Law-of-Charge-Conservation Inspired Spiking Neural Network. - Kang You; Ziling Wei; Jing Yan; Boning Zhang; Qinghai Guo; Yaoyu Zhang; Zhezhi He (CVPR, 2025)

HaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers. - Yiyao Yang; Fu Teng; Pengju Liu; Mengnan Qi; Chenyang Lv; Ji Li; Xuhong Zhang 002; Zhezhi He (DATE, 2025)

SeeLe: A Unified Acceleration Framework for Real-Time Gaussian Splatting. - Xiaotong Huang; He Zhu; Zihan Liu 002; Weikai Lin; Xiaohong Liu; Zhezhi He; Jingwen Leng; Minyi Guo; Yu Feng 007 (CoRR, 2025)

A Recursive Partition-Based In-Memory SIMD Computation Scheduler for Memory Footprint Minimization. - Xingyue Qian; Chenyang Lv; Zhezhi He; Weikang Qian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)