Routing algorithms in honeycomb meshes. - Weiwen Zhang; Xiaofan Yang; Yan Liang; Zhi Chao Huang (Int. J. Parallel Emergent Distributed Syst., 2009)

Research on the pressure field of hydrostatic center rest. - Bo Wu 014; Zhi Chao Huang; Junpeng Shao; Xiaodong Yu (EMEIT, 2011)

A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission. - Delong Cui; Bharath Raghavan; Ullas Singh; Anand Vasani; Zhi Chao Huang; Deyi Pi; Mehdi Khanpour; Ali Nazemi; Hassan Maarefi; Tamer A. Ali 001; Nick Huang; Wei Zhang; et al. (ISSCC, 2012)

A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission. - Delong Cui; Bharath Raghavan; Ullas Singh; Anand Vasani; Zhi Chao Huang; Deyi Pi; Mehdi Khanpour; Ali Nazemi; Hassan Maarefi; Wei Zhang; Tamer A. Ali 001; Nick Huang; et al. (IEEE J. Solid State Circuits, 2012)

A 1.6-V 25-µ A 5-ppm/°C Curvature-Compensated Bandgap Reference. - Ze-kun Zhou; Yue Shi 001; Zhi Chao Huang; Pei-Sheng Zhu; Ying-qian Ma; Yong-Chun Wang; Zao Chen; Xin Ming; Bo Zhang 027 (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A sub-2W 39.8-to-44.6Gb/s transmitter and receiver chipset with SFI-5.2 interface in 40nm CMOS. - Bharath Raghavan; Delong Cui; Ullas Singh; Hassan Maarefi; Dave Pi; Anand Vasani; Zhi Chao Huang; Afshin Momtaz; Jun Cao 001 (ISSCC, 2013)

A Sub-2 W 39.8-44.6 Gb/s Transmitter and Receiver Chipset With SFI-5.2 Interface in 40 nm CMOS. - Bharath Raghavan; Delong Cui; Ullas Singh; Hassan Maarefi; Deyi Pi; Anand Vasani; Zhi Chao Huang; Burak Çatli; Afshin Momtaz; Jun Cao 001 (IEEE J. Solid State Circuits, 2013)

A quad-channel 112-128 Gb/s coherent transmitter in 40 nm CMOS. - Adesh Garg; Ullas Singh; Nick Huang; Wayne Wong; Bin Liu; Zhi Chao Huang; Afshin Momtaz; Jun Cao 001 (VLSIC, 2014)

A 780 mW 4 × 28 Gb/s Transceiver for 100 GbE Gearbox PHY in 40 nm CMOS. - Ullas Singh; Adesh Garg; Bharath Raghavan; Nick Huang; Heng Zhang; Zhi Chao Huang; Afshin Momtaz; Jun Cao 001 (IEEE J. Solid State Circuits, 2014)

3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS. - Ali Nazemi; Kangmin Hu; Burak Çatli; Delong Cui; Ullas Singh; Tim He; Zhi Chao Huang; Bo Zhang 029; Afshin Momtaz; Jun Cao 001 (ISSCC, 2015)