Software fault tolerance for FPUs via vectorization. - Zhi Chen 001; Ryoichi Inagaki; Alexandru Nicolau; Alexander V. Veidenbaum (SAMOS, 2015)

SIMD-based soft error detection. - Zhi Chen 001; Alexandru Nicolau; Alexander V. Veidenbaum (Conf. Computing Frontiers, 2016)

LORE: A loop repository for the evaluation of compilers. - Zhi Chen 001; Zhangxiaowen Gong; Justin Josef Szaday; David C. Wong 001; David A. Padua; Alexandru Nicolau; Alexander V. Veidenbaum; Neftali Watkinson; Zehra Sura; Saeed Maleki; Josep Torrellas; Gerald DeJong (IISWC, 2017)

Using Hardware Counters to Predict Vectorization. - Neftali Watkinson; Aniket Shivam; Zhi Chen 001; Alexander V. Veidenbaum; Alexandru Nicolau; Zhangxiaowen Gong (LCPC, 2017)

CAMFAS: A Compiler Approach to Mitigate Fault Attacks via Enhanced SIMDization. - Zhi Chen 001; Junjie Shen 001; Alex Nicolau; Alexander V. Veidenbaum; Nahid Farhady Ghalaty; Rosario Cammarota (IACR Cryptol. ePrint Arch., 2017)

New Opportunities for Compilers in Computer Security. - Junjie Shen 001; Zhi Chen 001; Nahid Farhady Ghalaty; Rosario Cammarota; Alexandru Nicolau; Alexander V. Veidenbaum (LCPC, 2018)

An empirical study of the effect of source-level loop transformations on compiler stability. - Zhangxiaowen Gong; Zhi Chen 001; Justin Josef Szaday; David C. Wong 001; Zehra Sura; Neftali Watkinson; Saeed Maleki; David A. Padua; Alexander V. Veidenbaum; Alexandru Nicolau; Josep Torrellas (Proc. ACM Program. Lang., 2018)

SIMD Assisted Fault Detection and Fault Attack Mitigation. - Zhi Chen 001 (2018)