An Adaptive Loop Gain Tracking Digital PLL Using Spectrum-Balancing Technique. - Guan-Yu Su; Zhi-Heng Kang; Shen-Iuan Liu (VLSI-DAT, 2021)

An Adaptive Digital PLL Based on BBPFD Transition Probability. - Zhi-Heng Kang; Yu-Chi Yen; Guan-Yu Su; Shen-Iuan Liu (VLSI-DAT, 2022)

A 1.6-GHz DPLL Using Feedforward Phase-Error Cancellation. - Zhi-Heng Kang; Shen-Iuan Liu (IEEE J. Solid State Circuits, 2023)