An Energy Efficient Accelerator for Bidirectional Recurrent Neural Networks (BiRNNs) Using Hybrid-Iterative Compression With Error Sensitivity. - Guocai Nan; Zhengkuan Wang; Chenghua Wang; Bi Wu; Zhican Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies. - Zhican Wang; Gang Wang 063; Honglan Jiang; Ningyi Xu; Guanghui He (DAC, 2023)

DEFA: Efficient Deformable Attention Acceleration via Pruning-Assisted Grid-Sampling and Multi-Scale Parallel Processing. - Yansong Xu; Dongxu Lyu; Zhenyu Li; Yuzhou Chen; Zilong Wang; Gang Wang 063; Zhican Wang; Haomin Li 002; Guanghui He (DAC, 2024)

Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis. - Jiahao Gai; Hao Chen; Zhican Wang; Hongyu Zhou; Wanru Zhao; Nicholas D. Lane; Hongxiang Fan (ASP-DAC, 2025)

COSA Plus: Enhanced Co-Operative Systolic Arrays for Attention Mechanism in Transformers. - Zhican Wang; Gang Wang 063; Guanghui He (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Accelerating 3D Gaussian Splatting with Neural Sorting and Axis-Oriented Rasterization. - Zhican Wang; Guanghui He; Dantong Liu; Lingjun Gao; Shell Xu Hu; Chen Zhang; Zhuoran Song; Nicholas D. Lane; Wayne Luk; Hongxiang Fan (CoRR, 2025)

DESA: Dataflow Efficient Systolic Array for Acceleration of Transformers. - Zhican Wang; Hongxiang Fan; Guanghui He (IEEE Trans. Computers, 2025)

VEDA: Efficient LLM Generation Through Voting-based KV Cache Eviction and Dataflow-flexible Accelerator. - Zhican Wang; Hongxiang Fan; Haroon Waris; Gang Wang; Zhenyu Li; Jianfei Jiang 001; Yanan Sun 003; Guanghui He (CoRR, 2025)

SD-Acc: Accelerating Stable Diffusion through Phase-aware Sampling and Hardware Co-Optimizations. - Zhican Wang; Guanghui He; Hongxiang Fan (CoRR, 2025)